Rework list implementation, use iterator.

5 files changed, 42 insertions, 32 deletions

diff --git a/src/vhdl/translate/trans-chap12.adb b/src/vhdl/translate/trans-chap12.adb
index 28883babb..920271fa0 100644
--- a/src/vhdl/translate/trans-chap12.adb
+++ b/src/vhdl/translate/trans-chap12.adb
@@ -436,6 +436,7 @@ package body Trans.Chap12 is
          Dep_List : Iir_List;
          Dep : Iir;
          Dep_Unit : Iir_Design_Unit;
+         Dep_It : List_Iterator;
          Lib_Unit : Iir;
       begin
          --  Load the unit in memory to compute the dependence list.
@@ -475,15 +476,16 @@ package body Trans.Chap12 is
          end case;
 
          Dep_List := Get_Dependence_List (Unit);
-         for I in Natural loop
-            Dep := Get_Nth_Element (Dep_List, I);
-            exit when Dep = Null_Iir;
+         Dep_It := List_Iterate (Dep_List);
+         while Is_Valid (Dep_It) loop
+            Dep := Get_Element (Dep_It);
             Dep_Unit := Libraries.Find_Design_Unit (Dep);
             if Dep_Unit = Null_Iir then
                Error_Msg_Elab ("could not find design unit %n", +Dep);
             elsif not Get_Elab_Flag (Dep_Unit) then
                Add_Unit_Dependences (Dep_Unit);
             end if;
+            Next (Dep_It);
          end loop;
       end Add_Unit_Dependences;
 
diff --git a/src/vhdl/translate/trans-chap2.adb b/src/vhdl/translate/trans-chap2.adb
index c3260008f..41913c452 100644
--- a/src/vhdl/translate/trans-chap2.adb
+++ b/src/vhdl/translate/trans-chap2.adb
@@ -1118,17 +1118,17 @@ package body Trans.Chap2 is
 
    procedure Instantiate_Iir_List_Info (L : Iir_List)
    is
-      El : Iir;
+      It : List_Iterator;
    begin
       case L is
          when Null_Iir_List
             | Iir_List_All =>
             return;
          when others =>
-            for I in Natural loop
-               El := Get_Nth_Element (L, I);
-               exit when El = Null_Iir;
-               Instantiate_Iir_Info (El);
+            It := List_Iterate (L);
+            while Is_Valid (It) loop
+               Instantiate_Iir_Info (Get_Element (It));
+               Next (It);
             end loop;
       end case;
    end Instantiate_Iir_List_Info;
@@ -1704,15 +1704,14 @@ package body Trans.Chap2 is
 
    procedure Elab_Dependence (Design_Unit: Iir_Design_Unit)
    is
-      Depend_List : Iir_Design_Unit_List;
+      Depend_List : constant Iir_List := Get_Dependence_List (Design_Unit);
+      It : List_Iterator;
       Design      : Iir;
       Library_Unit: Iir;
    begin
-      Depend_List := Get_Dependence_List (Design_Unit);
-
-      for I in Natural loop
-         Design := Get_Nth_Element (Depend_List, I);
-         exit when Design = Null_Iir;
+      It := List_Iterate (Depend_List);
+      while Is_Valid (It) loop
+         Design := Get_Element (It);
          if Get_Kind (Design) = Iir_Kind_Design_Unit then
             Library_Unit := Get_Library_Unit (Design);
             case Get_Kind (Library_Unit) is
@@ -1737,6 +1736,7 @@ package body Trans.Chap2 is
                   Error_Kind ("elab_dependence", Library_Unit);
             end case;
          end if;
+         Next (It);
       end loop;
    end Elab_Dependence;
 
diff --git a/src/vhdl/translate/trans-chap9.adb b/src/vhdl/translate/trans-chap9.adb
index 0b2d3dc2a..3948bbe0b 100644
--- a/src/vhdl/translate/trans-chap9.adb
+++ b/src/vhdl/translate/trans-chap9.adb
@@ -241,6 +241,7 @@ package body Trans.Chap9 is
       Info : Ortho_Info_Acc;
 
       Drivers     : Iir_List;
+      It          : List_Iterator;
       Nbr_Drivers : Natural;
       Sig         : Iir;
    begin
@@ -273,8 +274,10 @@ package body Trans.Chap9 is
 
          Nbr_Drivers := Get_Nbr_Elements (Drivers);
          Info.Process_Drivers := new Direct_Driver_Arr (1 .. Nbr_Drivers);
+         It := List_Iterate (Drivers);
          for I in 1 .. Nbr_Drivers loop
-            Sig := Get_Nth_Element (Drivers, I - 1);
+            pragma Assert (Is_Valid (It));
+            Sig := Get_Element (It);
             Info.Process_Drivers (I) := (Sig => Sig, Var => Null_Var);
             Sig := Get_Object_Prefix (Sig);
             pragma Assert
@@ -288,7 +291,9 @@ package body Trans.Chap9 is
                --  Do not create driver severals times.
                Set_After_Drivers_Flag (Sig, True);
             end if;
+            Next (It);
          end loop;
+         pragma Assert (not Is_Valid (It));
          Trans_Analyzes.Free_Drivers_List (Drivers);
       end if;
       Pop_Instance_Factory (Info.Process_Scope'Access);
@@ -1112,16 +1117,18 @@ package body Trans.Chap9 is
    procedure Destroy_Types_In_List (L : Iir_List)
    is
       El : Iir;
+      It : List_Iterator;
    begin
       case L is
          when Null_Iir_List
             | Iir_List_All =>
             return;
          when others =>
-            for I in Natural loop
-               El := Get_Nth_Element (L, I);
-               exit when El = Null_Iir;
+            It := List_Iterate (L);
+            while Is_Valid (It) loop
+               El := Get_Element (It);
                Destroy_Types (El);
+               Next (It);
             end loop;
       end case;
    end Destroy_Types_In_List;
diff --git a/src/vhdl/translate/trans-helpers2.adb b/src/vhdl/translate/trans-helpers2.adb
index c1aab8e5f..d332711ac 100644
--- a/src/vhdl/translate/trans-helpers2.adb
+++ b/src/vhdl/translate/trans-helpers2.adb
@@ -211,19 +211,18 @@ package body Trans.Helpers2 is
 
    procedure Register_Signal_List (List : Iir_List; Proc : O_Dnode)
    is
+      It : List_Iterator;
       El  : Iir;
       Sig : Mnode;
    begin
-      if List = Null_Iir_List then
-         return;
-      end if;
-      for I in Natural loop
-         El := Get_Nth_Element (List, I);
-         exit when El = Null_Iir;
+      It := List_Iterate_Safe (List);
+      while Is_Valid (It) loop
+         El := Get_Element (It);
          Open_Temp;
          Sig := Chap6.Translate_Name (El, Mode_Signal);
          Register_Signal (Sig, Get_Type (El), Proc);
          Close_Temp;
+         Next (It);
       end loop;
    end Register_Signal_List;
 
diff --git a/src/vhdl/translate/trans_analyzes.adb b/src/vhdl/translate/trans_analyzes.adb
index 32b9fac65..09c822d2f 100644
--- a/src/vhdl/translate/trans_analyzes.adb
+++ b/src/vhdl/translate/trans_analyzes.adb
@@ -217,12 +217,12 @@ package body Trans_Analyzes is
 
    procedure Free_Drivers_List (List : in out Iir_List)
    is
-      El : Iir;
+      It : List_Iterator;
    begin
-      for I in Natural loop
-         El := Get_Nth_Element (List, I);
-         exit when El = Null_Iir;
-         Set_After_Drivers_Flag (Get_Object_Prefix (El), False);
+      It := List_Iterate (List);
+      while Is_Valid (It) loop
+         Set_After_Drivers_Flag (Get_Object_Prefix (Get_Element (It)), False);
+         Next (It);
       end loop;
       Destroy_Iir_List (List);
    end Free_Drivers_List;
@@ -232,14 +232,15 @@ package body Trans_Analyzes is
       use Ada.Text_IO;
       use Errorout;
       El : Iir;
+      It : List_Iterator;
    begin
       Report_Msg (Msgid_Note, Semantic, +Proc,
                   "List of drivers for %n:", (1 => +Proc));
       Report_Msg (Msgid_Note, Semantic, +Proc,
                   " (declared at %l)", (1 => +Proc));
-      for I in Natural loop
-         El := Get_Nth_Element (List, I);
-         exit when El = Null_Iir;
+      It := List_Iterate (List);
+      while Is_Valid (It) loop
+         El := Get_Element (It);
          if Get_After_Drivers_Flag (Get_Object_Prefix (El)) then
             Put ("*  ");
          else
@@ -247,6 +248,7 @@ package body Trans_Analyzes is
          end if;
          Disp_Vhdl.Disp_Vhdl (El);
          New_Line;
+         Next (It);
       end loop;
    end Dump_Drivers;