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author | Tristan Gingold <tgingold@free.fr> | 2019-10-15 18:49:37 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-10-15 18:49:37 +0200 |
commit | bbdbb49e9c72b322eb2b07cd07ea164a508be7c3 (patch) | |
tree | f1049fcf8f140aefd0d87f6b32d13ebbbb075d39 /src/vhdl/vhdl-annotations.adb | |
parent | 035c971dbfeb6ed63226fc66095a0c8555fb52ef (diff) | |
download | ghdl-bbdbb49e9c72b322eb2b07cd07ea164a508be7c3.tar.gz ghdl-bbdbb49e9c72b322eb2b07cd07ea164a508be7c3.tar.bz2 ghdl-bbdbb49e9c72b322eb2b07cd07ea164a508be7c3.zip |
vhdl: handle cover and restrict within vunit.
Diffstat (limited to 'src/vhdl/vhdl-annotations.adb')
-rw-r--r-- | src/vhdl/vhdl-annotations.adb | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb index fb24402c8..660a5001d 100644 --- a/src/vhdl/vhdl-annotations.adb +++ b/src/vhdl/vhdl-annotations.adb @@ -1181,7 +1181,9 @@ package body Vhdl.Annotations is when Iir_Kind_Psl_Default_Clock => null; when Iir_Kind_Psl_Assert_Directive - | Iir_Kind_Psl_Assume_Directive => + | Iir_Kind_Psl_Assume_Directive + | Iir_Kind_Psl_Cover_Directive + | Iir_Kind_Psl_Restrict_Directive => null; when others => Error_Kind ("annotate_vunit_declaration", Item); |