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author | Tristan Gingold <tgingold@free.fr> | 2022-06-05 22:14:47 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2022-06-05 22:14:47 +0200 |
commit | a638e3a2b4af985b6ed874f45eef5d65c19aea20 (patch) | |
tree | b71c78c958d432cf7c46d03badf1e73e9711834f /src/vhdl/vhdl-nodes.ads | |
parent | cd9f37d3907caec541ff501d092b3e9f6f823dc4 (diff) | |
download | ghdl-a638e3a2b4af985b6ed874f45eef5d65c19aea20.tar.gz ghdl-a638e3a2b4af985b6ed874f45eef5d65c19aea20.tar.bz2 ghdl-a638e3a2b4af985b6ed874f45eef5d65c19aea20.zip |
vhdl: recognize more predefined ieee functions and operators
Diffstat (limited to 'src/vhdl/vhdl-nodes.ads')
-rw-r--r-- | src/vhdl/vhdl-nodes.ads | 41 |
1 files changed, 40 insertions, 1 deletions
diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 9bf8d137d..c0d344dda 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5704,6 +5704,9 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_1164_Condition_Operator, + Iir_Predefined_Ieee_1164_To_01_Log_Log, + Iir_Predefined_Ieee_1164_To_01_Slv_Log, + Iir_Predefined_Ieee_1164_To_Hstring, Iir_Predefined_Ieee_1164_To_Ostring, @@ -5992,6 +5995,12 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Numeric_Std_Is_X_Uns, Iir_Predefined_Ieee_Numeric_Std_Is_X_Sgn, + Iir_Predefined_Ieee_Numeric_Std_To_Hstring_Uns, + Iir_Predefined_Ieee_Numeric_Std_To_Ostring_Uns, + + Iir_Predefined_Ieee_Numeric_Std_To_Hstring_Sgn, + Iir_Predefined_Ieee_Numeric_Std_To_Ostring_Sgn, + -- numeric_bit -- To_Integer, To_Unsigned, to_Signed @@ -6003,8 +6012,33 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Numeric_Bit_Tosgn_Int_Sgn_Sgn, -- Numeric_Std_Unsigned (ieee2008) + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Add_Slv_Slv, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Add_Slv_Nat, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Add_Nat_Slv, + + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Sub_Slv_Slv, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Sub_Slv_Nat, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Sub_Nat_Slv, + + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Find_Rightmost, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Find_Leftmost, + + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Shift_Left, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Shift_Right, + + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Rotate_Left, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Rotate_Right, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_To_Integer_Slv_Nat, - Iir_Predefined_Ieee_Numeric_Std_Unsigned_To_Slv_Nat_Nat_Slv, + + Iir_Predefined_Ieee_Numeric_Std_Unsigned_To_Slv_Nat_Nat, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_To_Slv_Nat_Slv, + + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Resize_Slv_Nat, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Resize_Slv_Slv, + + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Maximum_Slv_Slv, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Minimum_Slv_Slv, -- Math_Real Iir_Predefined_Ieee_Math_Real_Ceil, @@ -6352,6 +6386,11 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Numeric_Std_Add_Uns_Uns .. Iir_Predefined_Ieee_Numeric_Std_Xnor_Sgn_Sgn; + subtype Iir_Predefined_Ieee_Numeric_Std_Unsigned_Operators + is Iir_Predefined_Functions range + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Add_Slv_Slv .. + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Sub_Nat_Slv; + -- Size of scalar types. -- Their size is determined during analysis (using the range), so that -- all backends have the same view. |