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authorTristan Gingold <tgingold@free.fr>2019-10-25 06:53:08 +0200
committerTristan Gingold <tgingold@free.fr>2019-10-25 06:55:04 +0200
commit41384788259c77d0057375cb93a0cfd67002ab52 (patch)
tree652f188811d2c49eb34f9f319d6b04ce92d20a79 /src/vhdl/vhdl-sem_psl.adb
parent5a90460ddc6963cb9c19f5ed230f31aad590369e (diff)
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vhdl: extract sem_concurrent_statement, to handle hdl stmt in vunits.
Diffstat (limited to 'src/vhdl/vhdl-sem_psl.adb')
-rw-r--r--src/vhdl/vhdl-sem_psl.adb5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/vhdl/vhdl-sem_psl.adb b/src/vhdl/vhdl-sem_psl.adb
index 7bf1f1f6c..3843a3ff7 100644
--- a/src/vhdl/vhdl-sem_psl.adb
+++ b/src/vhdl/vhdl-sem_psl.adb
@@ -666,6 +666,9 @@ package body Vhdl.Sem_Psl is
Set_Severity_Expression (Res, Get_Severity_Expression (Stmt));
Set_Report_Expression (Res, Get_Report_Expression (Stmt));
Set_Postponed_Flag (Res, Get_Postponed_Flag (Stmt));
+
+ Set_Parent (Res, Get_Parent (Stmt));
+ Set_Chain (Res, Get_Chain (Stmt));
return Res;
end Rewrite_As_Concurrent_Assertion;
@@ -1010,6 +1013,8 @@ package body Vhdl.Sem_Psl is
| Iir_Kind_Procedure_Body =>
Sem_Decls.Sem_Declaration
(Item, Prev_Item, False, Attr_Spec_Chain);
+ when Iir_Kind_Concurrent_Simple_Signal_Assignment =>
+ Sem_Stmts.Sem_Concurrent_Statement (Item, False);
when others =>
Error_Kind ("sem_psl_verification_unit", Item);
end case;