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author | Tristan Gingold <tgingold@free.fr> | 2019-05-10 06:58:57 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-05-10 18:14:47 +0200 |
commit | db7d0b337e85c3b327efa799418ef92de3a369ce (patch) | |
tree | b1aec6a72ccf989da9617cbc0f581b12eb80b8c8 /src/vhdl/vhdl-std_package.adb | |
parent | 2c5ce4b3aab14d67e97623e8dfe31cf27a043e7c (diff) | |
download | ghdl-db7d0b337e85c3b327efa799418ef92de3a369ce.tar.gz ghdl-db7d0b337e85c3b327efa799418ef92de3a369ce.tar.bz2 ghdl-db7d0b337e85c3b327efa799418ef92de3a369ce.zip |
vhdl: replace Iir_Int64 by Int64, and Iir_Fp64 by Fp64.
Diffstat (limited to 'src/vhdl/vhdl-std_package.adb')
-rw-r--r-- | src/vhdl/vhdl-std_package.adb | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/vhdl/vhdl-std_package.adb b/src/vhdl/vhdl-std_package.adb index d112b0daf..cb6e3809d 100644 --- a/src/vhdl/vhdl-std_package.adb +++ b/src/vhdl/vhdl-std_package.adb @@ -26,7 +26,7 @@ with Vhdl.Sem_Utils; with Vhdl.Nodes_Utils; use Vhdl.Nodes_Utils; package body Vhdl.Std_Package is - type Bound_Array is array (Boolean) of Iir_Int64; + type Bound_Array is array (Boolean) of Int64; Low_Bound : constant Bound_Array := (False => -(2 ** 31), True => -(2 ** 63)); High_Bound : constant Bound_Array := (False => (2 ** 31) - 1, @@ -120,7 +120,7 @@ package body Vhdl.Std_Package is Set_Visible_Flag (Decl, True); end Set_Std_Identifier; - function Create_Std_Integer (Val : Iir_Int64; Lit_Type : Iir) + function Create_Std_Integer (Val : Int64; Lit_Type : Iir) return Iir_Integer_Literal is Res : Iir_Integer_Literal; @@ -132,7 +132,7 @@ package body Vhdl.Std_Package is return Res; end Create_Std_Integer; - function Create_Std_Fp (Val : Iir_Fp64; Lit_Type : Iir) + function Create_Std_Fp (Val : Fp64; Lit_Type : Iir) return Iir_Floating_Point_Literal is Res : Iir_Floating_Point_Literal; @@ -650,8 +650,8 @@ package body Vhdl.Std_Package is Set_Base_Type (Universal_Real_Subtype_Definition, Universal_Real_Type_Definition); Constraint := Create_Std_Range_Expr - (Create_Std_Fp (Iir_Fp64'First, Universal_Real_Type_Definition), - Create_Std_Fp (Iir_Fp64'Last, Universal_Real_Type_Definition), + (Create_Std_Fp (Fp64'First, Universal_Real_Type_Definition), + Create_Std_Fp (Fp64'Last, Universal_Real_Type_Definition), Universal_Real_Type_Definition); Set_Range_Constraint (Universal_Real_Subtype_Definition, Constraint); Set_Type_Staticness (Universal_Real_Subtype_Definition, Locally); @@ -764,8 +764,8 @@ package body Vhdl.Std_Package is Create_Std_Iir (Iir_Kind_Floating_Subtype_Definition); Set_Base_Type (Real_Subtype_Definition, Real_Type_Definition); Constraint := Create_Std_Range_Expr - (Create_Std_Fp (Iir_Fp64'First, Universal_Real_Type_Definition), - Create_Std_Fp (Iir_Fp64'Last, Universal_Real_Type_Definition), + (Create_Std_Fp (Fp64'First, Universal_Real_Type_Definition), + Create_Std_Fp (Fp64'Last, Universal_Real_Type_Definition), Universal_Real_Type_Definition); Set_Range_Constraint (Real_Subtype_Definition, Constraint); Set_Type_Staticness (Real_Subtype_Definition, Locally); @@ -792,7 +792,7 @@ package body Vhdl.Std_Package is Time_Staticness : Iir_Staticness; First_Unit, Last_Unit : Iir_Unit_Declaration; - function Create_Std_Phys_Lit_Wo_Unit (Value : Iir_Int64; Unit : Iir) + function Create_Std_Phys_Lit_Wo_Unit (Value : Int64; Unit : Iir) return Iir_Physical_Int_Literal is Lit: Iir_Physical_Int_Literal; @@ -806,7 +806,7 @@ package body Vhdl.Std_Package is return Lit; end Create_Std_Phys_Lit_Wo_Unit; - function Create_Std_Phys_Lit (Value : Iir_Int64; Unit : Iir) + function Create_Std_Phys_Lit (Value : Int64; Unit : Iir) return Iir_Physical_Int_Literal is Lit: Iir_Physical_Int_Literal; @@ -820,7 +820,7 @@ package body Vhdl.Std_Package is end Create_Std_Phys_Lit; procedure Create_Unit (Unit : out Iir_Unit_Declaration; - Multiplier_Value : Iir_Int64; + Multiplier_Value : Int64; Multiplier : in Iir_Unit_Declaration; Name : Name_Id) is |