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authorTristan Gingold <tgingold@free.fr>2019-05-12 08:29:54 +0200
committerTristan Gingold <tgingold@free.fr>2019-05-12 10:25:10 +0200
commit17eb0242dac5e119ec8f31a700c82aeff01b9869 (patch)
tree44c12e33284bf2d4c181083e5535e9d310c916bc /src/vhdl
parent649375789f8c5867028a882ef9ef67d1ed7975e4 (diff)
downloadghdl-17eb0242dac5e119ec8f31a700c82aeff01b9869.tar.gz
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errorout: add messages group instead of continuation.
Diffstat (limited to 'src/vhdl')
-rw-r--r--src/vhdl/vhdl-configuration.adb18
-rw-r--r--src/vhdl/vhdl-errors.adb25
-rw-r--r--src/vhdl/vhdl-errors.ads15
-rw-r--r--src/vhdl/vhdl-parse.adb51
-rw-r--r--src/vhdl/vhdl-scanner.adb16
-rw-r--r--src/vhdl/vhdl-sem.adb14
-rw-r--r--src/vhdl/vhdl-sem_assocs.adb8
-rw-r--r--src/vhdl/vhdl-sem_decls.adb9
-rw-r--r--src/vhdl/vhdl-sem_expr.adb20
-rw-r--r--src/vhdl/vhdl-sem_names.adb19
-rw-r--r--src/vhdl/vhdl-sem_psl.adb6
-rw-r--r--src/vhdl/vhdl-sem_scopes.adb4
-rw-r--r--src/vhdl/vhdl-sem_specs.adb37
-rw-r--r--src/vhdl/vhdl-sem_stmts.adb10
-rw-r--r--src/vhdl/vhdl-sem_types.adb43
15 files changed, 165 insertions, 130 deletions
diff --git a/src/vhdl/vhdl-configuration.adb b/src/vhdl/vhdl-configuration.adb
index 95ed0eb4e..f1ede2dc1 100644
--- a/src/vhdl/vhdl-configuration.adb
+++ b/src/vhdl/vhdl-configuration.adb
@@ -452,12 +452,14 @@ package body Vhdl.Configuration is
if Is_Warning_Enabled (Warnid_Binding)
and then not Get_Artificial_Flag (Assoc)
then
+ Report_Start_Group;
Warning_Msg_Elab
(Warnid_Binding, Assoc, "%n of %n is not bound",
- (+Formal, +Get_Parent (Formal)), Cont => True);
+ (+Formal, +Get_Parent (Formal)));
Warning_Msg_Elab
(Warnid_Binding, Current_Configuration,
"(in %n)", +Current_Configuration);
+ Report_End_Group;
end if;
end if;
Next_Association_Interface (Assoc, Inter);
@@ -552,13 +554,13 @@ package body Vhdl.Configuration is
if Is_Warning_Enabled (Warnid_Binding) then
Inst := Get_Nth_Element (Get_Instantiation_List (Conf), 0);
Inst := Strip_Denoting_Name (Inst);
- Warning_Msg_Elab
- (Warnid_Binding, Conf,
- "%n of %n is not bound",
- (+Inst, +Get_Instantiated_Unit (Inst)), Cont => True);
- Warning_Msg_Elab
- (Warnid_Binding, Current_Configuration,
- "(in %n)", +Current_Configuration);
+ Report_Start_Group;
+ Warning_Msg_Elab (Warnid_Binding, Conf,
+ "%n of %n is not bound",
+ (+Inst, +Get_Instantiated_Unit (Inst)));
+ Warning_Msg_Elab (Warnid_Binding, Current_Configuration,
+ "(in %n)", +Current_Configuration);
+ Report_End_Group;
end if;
return;
end if;
diff --git a/src/vhdl/vhdl-errors.adb b/src/vhdl/vhdl-errors.adb
index f1342f046..7912fd157 100644
--- a/src/vhdl/vhdl-errors.adb
+++ b/src/vhdl/vhdl-errors.adb
@@ -58,40 +58,36 @@ package body Vhdl.Errors is
procedure Warning_Msg_Sem (Id : Msgid_Warnings;
Loc : Location_Type;
Msg: String;
- Args : Earg_Arr := No_Eargs;
- Cont : Boolean := False) is
+ Args : Earg_Arr := No_Eargs) is
begin
if Flags.Flag_Only_Elab_Warnings then
return;
end if;
- Report_Msg (Id, Semantic, +Loc, Msg, Args, Cont);
+ Report_Msg (Id, Semantic, +Loc, Msg, Args);
end Warning_Msg_Sem;
procedure Warning_Msg_Sem (Id : Msgid_Warnings;
Loc : Location_Type;
Msg: String;
- Arg1 : Earg_Type;
- Cont : Boolean := False) is
+ Arg1 : Earg_Type) is
begin
- Warning_Msg_Sem (Id, Loc, Msg, Earg_Arr'(1 => Arg1), Cont);
+ Warning_Msg_Sem (Id, Loc, Msg, Earg_Arr'(1 => Arg1));
end Warning_Msg_Sem;
procedure Warning_Msg_Elab (Id : Msgid_Warnings;
Loc : Iir;
Msg: String;
- Arg1 : Earg_Type;
- Cont : Boolean := False) is
+ Arg1 : Earg_Type) is
begin
- Report_Msg (Id, Elaboration, +Loc, Msg, Earg_Arr'(1 => Arg1), Cont);
+ Report_Msg (Id, Elaboration, +Loc, Msg, Earg_Arr'(1 => Arg1));
end Warning_Msg_Elab;
procedure Warning_Msg_Elab (Id : Msgid_Warnings;
Loc : Iir;
Msg: String;
- Args : Earg_Arr := No_Eargs;
- Cont : Boolean := False) is
+ Args : Earg_Arr := No_Eargs) is
begin
- Report_Msg (Id, Elaboration, +Loc, Msg, Args, Cont);
+ Report_Msg (Id, Elaboration, +Loc, Msg, Args);
end Warning_Msg_Elab;
-- Disp a message during semantic analysis.
@@ -103,10 +99,9 @@ package body Vhdl.Errors is
procedure Error_Msg_Sem (Loc: Location_Type;
Msg: String;
- Args : Earg_Arr := No_Eargs;
- Cont : Boolean := False) is
+ Args : Earg_Arr := No_Eargs) is
begin
- Report_Msg (Msgid_Error, Semantic, +Loc, Msg, Args, Cont);
+ Report_Msg (Msgid_Error, Semantic, +Loc, Msg, Args);
end Error_Msg_Sem;
procedure Error_Msg_Sem
diff --git a/src/vhdl/vhdl-errors.ads b/src/vhdl/vhdl-errors.ads
index 41dcb0719..97d38e7d6 100644
--- a/src/vhdl/vhdl-errors.ads
+++ b/src/vhdl/vhdl-errors.ads
@@ -40,18 +40,15 @@ package Vhdl.Errors is
procedure Warning_Msg_Sem (Id : Msgid_Warnings;
Loc : Location_Type;
Msg: String;
- Args : Earg_Arr := No_Eargs;
- Cont : Boolean := False);
+ Args : Earg_Arr := No_Eargs);
procedure Warning_Msg_Sem (Id : Msgid_Warnings;
Loc : Location_Type;
Msg: String;
- Arg1 : Earg_Type;
- Cont : Boolean := False);
+ Arg1 : Earg_Type);
procedure Error_Msg_Sem (Loc: Location_Type;
Msg: String;
- Args : Earg_Arr := No_Eargs;
- Cont : Boolean := False);
+ Args : Earg_Arr := No_Eargs);
procedure Error_Msg_Sem
(Loc: Location_Type; Msg: String; Arg1 : Earg_Type);
@@ -81,13 +78,11 @@ package Vhdl.Errors is
procedure Warning_Msg_Elab (Id : Msgid_Warnings;
Loc : Iir;
Msg: String;
- Arg1 : Earg_Type;
- Cont : Boolean := False);
+ Arg1 : Earg_Type);
procedure Warning_Msg_Elab (Id : Msgid_Warnings;
Loc : Iir;
Msg: String;
- Args : Earg_Arr := No_Eargs;
- Cont : Boolean := False);
+ Args : Earg_Arr := No_Eargs);
-- Disp a bug message.
procedure Error_Internal (Expr: Iir; Msg: String := "");
diff --git a/src/vhdl/vhdl-parse.adb b/src/vhdl/vhdl-parse.adb
index cc01dab20..993e0c9cd 100644
--- a/src/vhdl/vhdl-parse.adb
+++ b/src/vhdl/vhdl-parse.adb
@@ -93,19 +93,16 @@ package body Vhdl.Parse is
Msg, (1 => Arg1));
end Error_Msg_Parse;
- procedure Error_Msg_Parse
- (Msg: String; Args : Earg_Arr := No_Eargs; Cont : Boolean := False) is
+ procedure Error_Msg_Parse (Msg: String; Args : Earg_Arr := No_Eargs) is
begin
- Report_Msg (Msgid_Error, Errorout.Parse, Get_Token_Coord,
- Msg, Args, Cont);
+ Report_Msg (Msgid_Error, Errorout.Parse, Get_Token_Coord, Msg, Args);
end Error_Msg_Parse;
procedure Error_Msg_Parse (Loc : Location_Type;
Msg: String;
- Args : Earg_Arr := No_Eargs;
- Cont : Boolean := False) is
+ Args : Earg_Arr := No_Eargs) is
begin
- Report_Msg (Msgid_Error, Errorout.Parse, +Loc, Msg, Args, Cont);
+ Report_Msg (Msgid_Error, Errorout.Parse, +Loc, Msg, Args);
end Error_Msg_Parse;
procedure Unexpected (Where: String) is
@@ -127,12 +124,13 @@ package body Vhdl.Parse is
end case;
if Msg'Length > 0 then
- Error_Msg_Parse (Loc, Msg, Args => No_Eargs, Cont => True);
+ Report_Start_Group;
+ Error_Msg_Parse (Loc, Msg, Args => No_Eargs);
Error_Msg_Parse (Loc, "(found: %t)", (1 => +Current_Token));
+ Report_End_Group;
elsif Current_Token = Tok_Identifier then
- Error_Msg_Parse
- (Loc, "%t is expected instead of %i",
- (+Token, +Current_Identifier));
+ Error_Msg_Parse (Loc, "%t is expected instead of %i",
+ (+Token, +Current_Identifier));
else
Error_Msg_Parse
(Loc, "%t is expected instead of %t", (+Token, + Current_Token));
@@ -1833,10 +1831,10 @@ package body Vhdl.Parse is
if Current_Token = Tok_Return then
if not Is_Func then
- Error_Msg_Parse
- ("'return' not allowed for a procedure", Cont => True);
- Error_Msg_Parse
- ("(remove return part or declare a function)");
+ Report_Start_Group;
+ Error_Msg_Parse ("'return' not allowed for a procedure");
+ Error_Msg_Parse ("(remove return part or declare a function)");
+ Report_End_Group;
-- Skip 'return'
Scan;
@@ -2815,9 +2813,11 @@ package body Vhdl.Parse is
Error_Msg_Parse ("protected type not allowed in vhdl87/93");
Decl := Parse_Protected_Type_Definition (Ident, Loc);
else
+ Report_Start_Group;
Error_Msg_Parse ("type %i cannot be defined from another type",
- (1 => +Ident), Cont => True);
+ +Ident);
Error_Msg_Parse ("(you should declare a subtype)");
+ Report_End_Group;
Decl := Create_Iir (Iir_Kind_Type_Declaration);
end if;
@@ -5898,10 +5898,12 @@ package body Vhdl.Parse is
-- Catch errors for Ada programmers.
if Current_Token = Tok_Then or Current_Token = Tok_Else then
+ Report_Start_Group;
Error_Msg_Parse ("""or else"" and ""and then"" sequences "
- & "are not allowed in vhdl", Cont => True);
+ & "are not allowed in vhdl");
Error_Msg_Parse ("""and"" and ""or"" are short-circuit "
- & "operators for BIT and BOOLEAN types");
+ & "operators for BIT and BOOLEAN types");
+ Report_End_Group;
Scan;
end if;
@@ -5929,10 +5931,10 @@ package body Vhdl.Parse is
elsif Op_Prio = Prio_Logical then
if Current_Token = Op_Tok then
if Op_Tok = Tok_Nand or Op_Tok = Tok_Nor then
- Error_Msg_Parse
- ("sequence of 'nor' or 'nand' not allowed", Cont => True);
- Error_Msg_Parse
- ("('nor' and 'nand' are not associative)");
+ Report_Start_Group;
+ Error_Msg_Parse ("sequence of 'nor' or 'nand' not allowed");
+ Error_Msg_Parse ("('nor' and 'nand' are not associative)");
+ Report_End_Group;
end if;
elsif Current_Token in Token_Logical_Type then
-- Expression is a sequence of relations, with the same
@@ -7701,10 +7703,11 @@ package body Vhdl.Parse is
Res : Iir;
begin
if Flags.Vhdl_Std = Vhdl_87 then
+ Report_Start_Group;
Error_Msg_Parse
- ("component instantiation using keyword 'component', 'entity',",
- Cont => True);
+ ("component instantiation using keyword 'component', 'entity',");
Error_Msg_Parse (" or 'configuration' is not allowed in vhdl87");
+ Report_End_Group;
end if;
case Current_Token is
diff --git a/src/vhdl/vhdl-scanner.adb b/src/vhdl/vhdl-scanner.adb
index ec0580f2d..c17f3553e 100644
--- a/src/vhdl/vhdl-scanner.adb
+++ b/src/vhdl/vhdl-scanner.adb
@@ -218,20 +218,20 @@ package body Vhdl.Scanner is
end Error_Msg_Scan;
-- Disp a message during scan.
- procedure Warning_Msg_Scan (Id : Msgid_Warnings; Msg: String) is
+ procedure Warning_Msg_Scan (Id : Msgid_Warnings;
+ Msg: String;
+ Arg1 : Earg_Type) is
begin
- Report_Msg (Id, Scan, Get_Current_Coord, Msg);
+ Report_Msg (Id, Scan, Get_Current_Coord, Msg, (1 => Arg1));
end Warning_Msg_Scan;
procedure Warning_Msg_Scan (Id : Msgid_Warnings;
Msg: String;
- Arg1 : Earg_Type;
- Cont : Boolean := False) is
+ Args : Earg_Arr := No_Eargs) is
begin
- Report_Msg (Id, Scan, Get_Current_Coord, Msg, (1 => Arg1), Cont);
+ Report_Msg (Id, Scan, Get_Current_Coord, Msg, Args);
end Warning_Msg_Scan;
-
Source: File_Buffer_Acc renames Current_Context.Source;
Pos: Source_Ptr renames Current_Context.Pos;
@@ -1255,13 +1255,15 @@ package body Vhdl.Scanner is
when Std_Names.Name_Id_Vhdl93_Reserved_Words =>
if Vhdl_Std = Vhdl_87 then
if Is_Warning_Enabled (Warnid_Reserved_Word) then
+ Report_Start_Group;
Warning_Msg_Scan
(Warnid_Reserved_Word,
"using %i vhdl93 reserved word as a vhdl87 identifier",
- +Current_Identifier, True);
+ +Current_Identifier);
Warning_Msg_Scan
(Warnid_Reserved_Word,
"(use option --std=93 to compile as vhdl93)");
+ Report_End_Group;
end if;
Current_Token := Tok_Identifier;
end if;
diff --git a/src/vhdl/vhdl-sem.adb b/src/vhdl/vhdl-sem.adb
index dd353134e..53a61ca3b 100644
--- a/src/vhdl/vhdl-sem.adb
+++ b/src/vhdl/vhdl-sem.adb
@@ -2142,11 +2142,12 @@ package body Vhdl.Sem is
is
procedure Error_Wait (Caller : Iir; Callee : Iir) is
begin
+ Report_Start_Group;
Error_Msg_Sem
- (+Caller, "%n must not contain wait statement, but calls",
- (1 => +Caller), Cont => True);
+ (+Caller, "%n must not contain wait statement, but calls", +Caller);
Error_Msg_Sem
(+Callee, "%n which has (indirectly) a wait statement", +Callee);
+ Report_End_Group;
end Error_Wait;
-- Kind of subprg.
@@ -2341,12 +2342,14 @@ package body Vhdl.Sem is
-- signal whose explicit ancestor is not a formal signal
-- parameter or member of a formal parameter of
-- the subprogram or of any of its parents.
+ Report_Start_Group;
Error_Msg_Sem
(+Subprg, "all-sensitized %n can't call %n",
- (+Subprg, +Callee), Cont => True);
+ (+Subprg, +Callee));
Error_Msg_Sem
(+Subprg,
" (as this subprogram reads (indirectly) a signal)");
+ Report_End_Group;
end case;
end if;
@@ -2467,18 +2470,19 @@ package body Vhdl.Sem is
pragma Assert (Callees /= Null_Iir_List);
Callee : constant Iir := Get_First_Element (Callees);
begin
+ Report_Start_Group;
Warning_Msg_Sem
(Warnid_Delayed_Checks, +El,
"can't assert that all calls in %n"
& " are pure or have not wait;"
- & " will be checked at elaboration",
- +El, Cont => True);
+ & " will be checked at elaboration", +El);
-- FIXME: could improve this message by displaying
-- the chain of calls until the first subprograms in
-- unknown state.
Warning_Msg_Sem
(Warnid_Delayed_Checks, +Callee,
"(first such call is to %n)", +Callee);
+ Report_End_Group;
end;
end if;
end if;
diff --git a/src/vhdl/vhdl-sem_assocs.adb b/src/vhdl/vhdl-sem_assocs.adb
index 6c92566c6..ee965d0a0 100644
--- a/src/vhdl/vhdl-sem_assocs.adb
+++ b/src/vhdl/vhdl-sem_assocs.adb
@@ -1872,13 +1872,15 @@ package body Vhdl.Sem_Assocs is
if Match = Not_Compatible then
if Finish and then not Is_Error (Actual) then
- Error_Msg_Sem (+Assoc, "can't associate %n with %n",
- (+Actual, +Inter), Cont => True);
+ Report_Start_Group;
+ Error_Msg_Sem
+ (+Assoc, "can't associate %n with %n", (+Actual, +Inter));
Error_Msg_Sem
(+Assoc, "(type of %n is " & Disp_Type_Of (Actual) & ")",
- (1 => +Actual), Cont => True);
+ (1 => +Actual));
Error_Msg_Sem
(+Inter, "(type of %n is " & Disp_Type_Of (Inter) & ")", +Inter);
+ Report_End_Group;
end if;
return;
end if;
diff --git a/src/vhdl/vhdl-sem_decls.adb b/src/vhdl/vhdl-sem_decls.adb
index a45d37ecf..2f29562bf 100644
--- a/src/vhdl/vhdl-sem_decls.adb
+++ b/src/vhdl/vhdl-sem_decls.adb
@@ -1422,11 +1422,11 @@ package body Vhdl.Sem_Decls is
Res := El;
else
Error := True;
+ Report_Start_Group;
Error_Msg_Sem
(+Sig,
- "cannot resolve signature, many matching subprograms:",
- Cont => True);
- Error_Msg_Sem (+Res, "found: %n", (1 => +Res), Cont => True);
+ "cannot resolve signature, many matching subprograms:");
+ Error_Msg_Sem (+Res, "found: %n", +Res);
end if;
if Error then
Error_Msg_Sem (+El, "found: %n", +El);
@@ -1434,6 +1434,9 @@ package body Vhdl.Sem_Decls is
end if;
Next (Ov_It);
end loop;
+ if Error then
+ Report_End_Group;
+ end if;
-- Free the overload list (with a workaround as only variables can
-- be free).
diff --git a/src/vhdl/vhdl-sem_expr.adb b/src/vhdl/vhdl-sem_expr.adb
index 2c977a52b..dfbf004e0 100644
--- a/src/vhdl/vhdl-sem_expr.adb
+++ b/src/vhdl/vhdl-sem_expr.adb
@@ -1044,13 +1044,13 @@ package body Vhdl.Sem_Expr is
is
procedure Error_Wait is
begin
+ Report_Start_Group;
Error_Msg_Sem
(+Loc, "%n must not contain wait statement, but calls",
- (1 => +Subprg), Cont => True);
+ (1 => +Subprg));
Error_Msg_Sem
(+Callee, "%n which has (indirectly) a wait statement", +Callee);
- --Error_Msg_Sem
- -- ("(indirect) wait statement not allowed in " & Where, Loc);
+ Report_End_Group;
end Error_Wait;
begin
pragma Assert (Get_Kind (Callee) = Iir_Kind_Procedure_Declaration);
@@ -1137,11 +1137,13 @@ package body Vhdl.Sem_Expr is
-- signal whose explicit ancestor is not a formal signal
-- parameter or member of a formal parameter of
-- the subprogram or of any of its parents.
+ Report_Start_Group;
Error_Msg_Sem (+Loc, "all-sensitized %n can't call %n",
- (+Subprg, +Callee), Cont => True);
+ (+Subprg, +Callee));
Error_Msg_Sem
(+Loc,
" (as this subprogram reads (indirectly) a signal)");
+ Report_End_Group;
end if;
when Iir_Kind_Process_Statement =>
return;
@@ -1392,18 +1394,20 @@ package body Vhdl.Sem_Expr is
-- Only one interpretation for the subprogram name.
if Is_Func then
if not Is_Function_Declaration (Inter_List) then
- Error_Msg_Sem (+Expr, "name does not designate a function",
- Cont => True);
+ Report_Start_Group;
+ Error_Msg_Sem (+Expr, "name does not designate a function");
Error_Msg_Sem (+Expr, "name is %n defined at %l",
(+Inter_List, +Inter_List));
+ Report_End_Group;
return Null_Iir;
end if;
else
if not Is_Procedure_Declaration (Inter_List) then
- Error_Msg_Sem (+Expr, "name does not designate a procedure",
- Cont => True);
+ Report_Start_Group;
+ Error_Msg_Sem (+Expr, "name does not designate a procedure");
Error_Msg_Sem (+Expr, "name is %n defined at %l",
(+Inter_List, +Inter_List));
+ Report_End_Group;
return Null_Iir;
end if;
end if;
diff --git a/src/vhdl/vhdl-sem_names.adb b/src/vhdl/vhdl-sem_names.adb
index ac3ec321a..32195d92f 100644
--- a/src/vhdl/vhdl-sem_names.adb
+++ b/src/vhdl/vhdl-sem_names.adb
@@ -62,7 +62,8 @@ package body Vhdl.Sem_Names is
El : Iir;
It : List_Iterator;
begin
- Error_Msg_Sem (+Loc, "possible interpretations are:", Cont => True);
+ Report_Start_Group;
+ Error_Msg_Sem (+Loc, "possible interpretations are:");
It := List_Iterate (List);
while Is_Valid (It) loop
El := Get_Element (It);
@@ -78,6 +79,7 @@ package body Vhdl.Sem_Names is
end case;
Next (It);
end loop;
+ Report_End_Group;
end Disp_Overload_List;
-- Create an overload list.
@@ -3014,12 +3016,13 @@ package body Vhdl.Sem_Names is
if Get_Kind (Prefix_Type)
not in Iir_Kinds_Scalar_Type_And_Subtype_Definition
then
+ Report_Start_Group;
Error_Msg_Sem
- (+Attr, "prefix of %i attribute must be a scalar type",
- (1 => +Id), Cont => True);
+ (+Attr, "prefix of %i attribute must be a scalar type", +Id);
Error_Msg_Sem
(+Attr, "found %n defined at %l",
(+Prefix_Type, +Prefix_Type));
+ Report_End_Group;
return Error_Mark;
end if;
when others =>
@@ -3029,13 +3032,14 @@ package body Vhdl.Sem_Names is
| Iir_Kind_Physical_Type_Definition =>
null;
when others =>
+ Report_Start_Group;
Error_Msg_Sem
(+Attr, "prefix of %i"
- & " attribute must be discrete or physical type",
- (1 => +Id), Cont => True);
+ & " attribute must be discrete or physical type", +Id);
Error_Msg_Sem
(+Attr, "found %n defined at %l",
(+Prefix_Type, +Prefix_Type));
+ Report_End_Group;
return Error_Mark;
end case;
end case;
@@ -4187,11 +4191,12 @@ package body Vhdl.Sem_Names is
when Iir_Kind_Error =>
return Atype;
when others =>
+ Report_Start_Group;
Error_Msg_Sem
- (+Name, "a type mark must denote a type or a subtype",
- Cont => True);
+ (+Name, "a type mark must denote a type or a subtype");
Error_Msg_Sem
(+Name, "(type mark denotes %n)", +Atype);
+ Report_End_Group;
return Create_Error_Type (Atype);
end case;
when Iir_Kind_Subtype_Attribute
diff --git a/src/vhdl/vhdl-sem_psl.adb b/src/vhdl/vhdl-sem_psl.adb
index 57f8695d3..767cd0c01 100644
--- a/src/vhdl/vhdl-sem_psl.adb
+++ b/src/vhdl/vhdl-sem_psl.adb
@@ -17,6 +17,7 @@
-- 02111-1307, USA.
with Types; use Types;
+with Errorout; use Errorout;
with PSL.Types; use PSL.Types;
with PSL.Nodes; use PSL.Nodes;
with PSL.Subsets;
@@ -707,12 +708,13 @@ package body Vhdl.Sem_Psl is
if Current_Psl_Default_Clock /= Null_Iir
and then Get_Parent (Current_Psl_Default_Clock) = Get_Parent (Stmt)
then
+ Report_Start_Group;
Error_Msg_Sem
- (+Stmt, "redeclaration of PSL default clock in the same region",
- Cont => True);
+ (+Stmt, "redeclaration of PSL default clock in the same region");
Error_Msg_Sem
(+Current_Psl_Default_Clock,
" (previous default clock declaration)");
+ Report_End_Group;
end if;
Expr := Sem_Boolean (Get_Psl_Boolean (Stmt));
Set_Psl_Boolean (Stmt, Expr);
diff --git a/src/vhdl/vhdl-sem_scopes.adb b/src/vhdl/vhdl-sem_scopes.adb
index 0388faeb2..85e46000c 100644
--- a/src/vhdl/vhdl-sem_scopes.adb
+++ b/src/vhdl/vhdl-sem_scopes.adb
@@ -935,11 +935,13 @@ package body Vhdl.Sem_Scopes is
-- declarative region must not be homographs,
-- FIXME: unless one of them is the implicit declaration of a
-- predefined operation.
+ Report_Start_Group;
Error_Msg_Sem
(+Decl, "identifier %i already used for a declaration",
- (1 => +Ident), Cont => True);
+ +Ident);
Error_Msg_Sem
(+Current_Decl, "previous declaration: %n", +Current_Decl);
+ Report_End_Group;
return;
else
-- Homograph, not in the same scope.
diff --git a/src/vhdl/vhdl-sem_specs.adb b/src/vhdl/vhdl-sem_specs.adb
index ab0a88d24..aecaaa47f 100644
--- a/src/vhdl/vhdl-sem_specs.adb
+++ b/src/vhdl/vhdl-sem_specs.adb
@@ -274,18 +274,21 @@ package body Vhdl.Sem_Specs is
return;
end if;
if Check_Defined then
+ Report_Start_Group;
Error_Msg_Sem
- (+Attr, "%n has already %n", (+Decl, +Attr),
- Cont => True);
+ (+Attr, "%n has already %n", (+Decl, +Attr));
Error_Msg_Sem
(+Attr, "previous attribute specification at %l", +El);
+ Report_End_Group;
end if;
return;
elsif Get_Identifier (El_Attr) = Get_Identifier (Attr_Decl) then
+ Report_Start_Group;
Error_Msg_Sem (+Attr, "%n is already decorated with an %n",
- (+Decl, +El_Attr), Cont => True);
+ (+Decl, +El_Attr));
Error_Msg_Sem
(+El, "(previous attribute specification was here)");
+ Report_End_Group;
return;
end if;
end;
@@ -946,9 +949,10 @@ package body Vhdl.Sem_Specs is
if Get_Identifier (Get_Attribute_Designator (Decl))
= Get_Identifier (Get_Attribute_Designator (Spec))
then
+ Report_Start_Group;
Error_Msg_Sem
(+Decl, "no attribute specification may follow an "
- & "all/others spec", Cont => True);
+ & "all/others spec");
Has_Error := True;
end if;
else
@@ -956,15 +960,17 @@ package body Vhdl.Sem_Specs is
-- It is an error if a named entity in the specificied entity
-- class is declared in a given declarative part following such
-- an attribute specification.
+ Report_Start_Group;
Error_Msg_Sem
(+Decl, "no named entity may follow an all/others attribute "
- & "specification", Cont => True);
+ & "specification");
Has_Error := True;
end if;
if Has_Error then
Error_Msg_Sem
(+Spec, "(previous all/others specification for the given "
&"entity class)");
+ Report_End_Group;
end if;
end if;
Spec := Get_Attribute_Specification_Chain (Spec);
@@ -1264,10 +1270,12 @@ package body Vhdl.Sem_Specs is
procedure Prev_Spec_Error is
begin
+ Report_Start_Group;
Error_Msg_Sem
(+Spec, "%n is alreay bound by a configuration specification",
- (1 => +Comp), Cont => True);
+ +Comp);
Error_Msg_Sem (+Prev_Spec, "(previous is %n)", +Prev_Spec);
+ Report_End_Group;
end Prev_Spec_Error;
Prev_Binding : Iir_Binding_Indication;
@@ -1308,10 +1316,12 @@ package body Vhdl.Sem_Specs is
-- How can this happen ?
raise Internal_Error;
when Iir_Kind_Component_Configuration =>
+ Report_Start_Group;
Error_Msg_Sem
(+Spec, "%n is already bound by a component configuration",
- (1 => +Comp), Cont => True);
+ +Comp);
Error_Msg_Sem (+Prev_Conf, "(previous is %n)", +Prev_Conf);
+ Report_End_Group;
return;
when others =>
Error_Kind ("apply_configuration_specification(2)", Spec);
@@ -1650,9 +1660,7 @@ package body Vhdl.Sem_Specs is
if Error then
return;
end if;
- Error_Msg_Sem
- (+Parent, "for default port binding of %n:",
- (1 => +Parent), Cont => True);
+ Error_Msg_Sem (+Parent, "for default port binding of %n:", +Parent);
Error := True;
end Error_Header;
@@ -1687,25 +1695,28 @@ package body Vhdl.Sem_Specs is
Location_Copy (Assoc, Parent);
else
if Are_Nodes_Compatible (Comp_El, Ent_El) = Not_Compatible then
+ Report_Start_Group;
Error_Header;
Error_Msg_Sem
- (+Parent, "type of %n declared at %l",
- (+Comp_El, +Comp_El), Cont => True);
+ (+Parent, "type of %n declared at %l", (+Comp_El, +Comp_El));
Error_Msg_Sem
(+Parent, "not compatible with type of %n declared at %l",
(+Ent_El, +Ent_El));
+ Report_End_Group;
elsif Kind = Map_Port
and then not Check_Port_Association_Mode_Restrictions
(Ent_El, Comp_El, Null_Iir)
then
+ Report_Start_Group;
Error_Header;
Error_Msg_Sem (+Parent, "cannot associate "
& Get_Mode_Name (Get_Mode (Ent_El))
& " %n declared at %l",
- (+Ent_El, +Ent_El), Cont => True);
+ (+Ent_El, +Ent_El));
Error_Msg_Sem (+Parent, "with actual port of mode "
& Get_Mode_Name (Get_Mode (Comp_El))
& " declared at %l", +Comp_El);
+ Report_End_Group;
end if;
Assoc := Create_Iir (Iir_Kind_Association_Element_By_Expression);
Location_Copy (Assoc, Parent);
diff --git a/src/vhdl/vhdl-sem_stmts.adb b/src/vhdl/vhdl-sem_stmts.adb
index 0d30dda9a..778a15d2b 100644
--- a/src/vhdl/vhdl-sem_stmts.adb
+++ b/src/vhdl/vhdl-sem_stmts.adb
@@ -204,11 +204,12 @@ package body Vhdl.Sem_Stmts is
for I in Name_Arr'Range loop
for J in 0 .. I - 1 loop
if not Is_Disjoint (Obj_Arr (I), Obj_Arr (J)) then
+ Report_Start_Group;
Error_Msg_Sem
- (+Name_Arr (I), "target is assigned more than once",
- Cont => True);
+ (+Name_Arr (I), "target is assigned more than once");
Error_Msg_Sem
(+Name_Arr (J), " (previous assignment is here)");
+ Report_End_Group;
return;
end if;
end loop;
@@ -679,9 +680,10 @@ package body Vhdl.Sem_Stmts is
| Iir_Kind_Guard_Signal_Declaration =>
null;
when others =>
- Error_Msg_Sem (+Stmt, "visible GUARD object is not a signal",
- Cont => True);
+ Report_Start_Group;
+ Error_Msg_Sem (+Stmt, "visible GUARD object is not a signal");
Error_Msg_Sem (+Stmt, "GUARD object is %n", +Guard);
+ Report_End_Group;
return;
end case;
diff --git a/src/vhdl/vhdl-sem_types.adb b/src/vhdl/vhdl-sem_types.adb
index aa243bb23..88d410e76 100644
--- a/src/vhdl/vhdl-sem_types.adb
+++ b/src/vhdl/vhdl-sem_types.adb
@@ -691,19 +691,19 @@ package body Vhdl.Sem_Types is
then
Set_Protected_Type_Declaration (Bod, Decl);
if Get_Protected_Type_Body (Decl) /= Null_Iir then
+ Report_Start_Group;
Error_Msg_Sem
- (+Bod, "protected type body already declared for %n",
- (1 => +Decl), Cont => True);
+ (+Bod, "protected type body already declared for %n", +Decl);
Error_Msg_Sem
(+Get_Protected_Type_Body (Decl), "(previous body)");
+ Report_End_Group;
Decl := Null_Iir;
elsif not Get_Visible_Flag (Type_Decl) then
-- Can this happen ?
- Error_Msg_Sem
- (+Bod, "protected type declaration not yet visible",
- Cont => True);
- Error_Msg_Sem
- (+Decl, "(location of protected type declaration)");
+ Report_Start_Group;
+ Error_Msg_Sem (+Bod, "protected type declaration not yet visible");
+ Error_Msg_Sem (+Decl, "(location of protected type declaration)");
+ Report_End_Group;
Decl := Null_Iir;
else
Set_Protected_Type_Body (Decl, Bod);
@@ -1388,12 +1388,13 @@ package body Vhdl.Sem_Types is
if Res /= Null_Iir then
if not Has_Error then
Has_Error := True;
+ Report_Start_Group;
Error_Msg_Sem
(+Atype,
- "can't resolve overload for resolution function",
- Cont => True);
+ "can't resolve overload for resolution function");
Error_Msg_Sem (+Atype, "candidate functions are:");
Error_Msg_Sem (+Func, " " & Disp_Subprg (Func));
+ Report_End_Group;
end if;
Error_Msg_Sem (+El, " " & Disp_Subprg (El));
else
@@ -1718,12 +1719,13 @@ package body Vhdl.Sem_Types is
-- The type mark must denote either an unconstrained array
-- type, or an access type whose designated type is such
-- an array type.
+ Report_Start_Group;
Error_Msg_Sem
(+Def,
- "only unconstrained array type may be contrained by index",
- Cont => True);
+ "only unconstrained array type may be contrained by index");
Error_Msg_Sem
(+Type_Mark, " (type mark is %n)", +Type_Mark);
+ Report_End_Group;
return Type_Mark;
end case;
end if;
@@ -1992,11 +1994,12 @@ package body Vhdl.Sem_Types is
else
Pos := Natural (Get_Element_Position (Tm_El));
if Els (Pos) /= Null_Iir then
+ Report_Start_Group;
Error_Msg_Sem
- (+El, "%n was already constrained",
- (1 => +El), Cont => True);
+ (+El, "%n was already constrained", +El);
Error_Msg_Sem
(+Els (Pos), " (location of previous constrained)");
+ Report_End_Group;
else
Els (Pos) := El;
Set_Parent (El, Res);
@@ -2039,10 +2042,11 @@ package body Vhdl.Sem_Types is
else
Pos := Natural (Get_Element_Position (Tm_El));
if Res_Els (Pos) /= Null_Iir then
- Error_Msg_Sem (+El, "%n was already resolved",
- (1 => +El), Cont => True);
+ Report_Start_Group;
+ Error_Msg_Sem (+El, "%n was already resolved", +El);
Error_Msg_Sem
(+Els (Pos), " (location of previous constrained)");
+ Report_End_Group;
else
Res_Els (Pos) := Tm_El;
end if;
@@ -2124,11 +2128,10 @@ package body Vhdl.Sem_Types is
-- FIXME: find the correct sentence from LRM
-- GHDL: subtype_definition may also be used just to add
-- a resolution function.
- Error_Msg_Sem
- (+Def, "only scalar types may be constrained by range",
- Cont => True);
- Error_Msg_Sem
- (+Type_Mark, " (type mark is %n)", +Type_Mark);
+ Report_Start_Group;
+ Error_Msg_Sem (+Def, "only scalar types may be constrained by range");
+ Error_Msg_Sem (+Type_Mark, " (type mark is %n)", +Type_Mark);
+ Report_End_Group;
Res := Copy_Subtype_Indication (Type_Mark);
else
Tolerance := Get_Tolerance (Def);