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authorTristan Gingold <tgingold@free.fr>2017-12-05 18:31:04 +0100
committerTristan Gingold <tgingold@free.fr>2017-12-05 18:31:04 +0100
commit18b19a5c8e99f1e0b562eafb95869cfe4cca8ceb (patch)
treed489919296d5df49df18cd3cbbe1b88fde2acccd /src/vhdl
parent344ca60dd3b9cc8547951a5573b1bb209b3e7b5b (diff)
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simul: handle unconstrained case choice.
Diffstat (limited to 'src/vhdl')
-rw-r--r--src/vhdl/simulate/simul-execution.adb18
1 files changed, 17 insertions, 1 deletions
diff --git a/src/vhdl/simulate/simul-execution.adb b/src/vhdl/simulate/simul-execution.adb
index bdcb42ebc..0e698d7c5 100644
--- a/src/vhdl/simulate/simul-execution.adb
+++ b/src/vhdl/simulate/simul-execution.adb
@@ -4520,6 +4520,7 @@ package body Simul.Execution is
is
Instance : constant Block_Instance_Acc := Proc.Instance;
Stmt : constant Iir := Instance.Stmt;
+ Expr : constant Iir := Get_Expression (Stmt);
Value: Iir_Value_Literal_Acc;
Assoc: Iir;
Stmt_Chain : Iir;
@@ -4527,8 +4528,23 @@ package body Simul.Execution is
begin
Mark (Marker, Expr_Pool);
- Value := Execute_Expression (Instance, Get_Expression (Stmt));
+ Value := Execute_Expression (Instance, Expr);
Assoc := Get_Case_Statement_Alternative_Chain (Stmt);
+ if Get_Type_Staticness (Get_Type (Expr)) /= Locally
+ and then Get_Kind (Assoc) = Iir_Kind_Choice_By_Expression
+ then
+ declare
+ Choice_Type : constant Iir :=
+ Get_Type (Get_Choice_Expression (Assoc));
+ Choice_Len : Iir_Int64;
+ begin
+ Choice_Len := Evaluation.Eval_Discrete_Type_Length
+ (Get_String_Type_Bound_Type (Choice_Type));
+ if Choice_Len /= Iir_Int64 (Value.Bounds.D (1).Length) then
+ Error_Msg_Constraint (Expr);
+ end if;
+ end;
+ end if;
while Assoc /= Null_Iir loop
if not Get_Same_Alternative_Flag (Assoc) then