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| author | Tristan Gingold <tgingold@free.fr> | 2017-12-08 06:12:43 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2017-12-08 06:12:43 +0100 |
| commit | 7f824fde23f990fffed235a9313d68f4af056090 (patch) | |
| tree | b3333d61b95a64a1329050c7cc95799c6097a31b /src/vhdl | |
| parent | 7be66ca6f555a8d6ce86f4bc6eee9811c8d53306 (diff) | |
| download | ghdl-7f824fde23f990fffed235a9313d68f4af056090.tar.gz ghdl-7f824fde23f990fffed235a9313d68f4af056090.tar.bz2 ghdl-7f824fde23f990fffed235a9313d68f4af056090.zip | |
simul-debugger: add debug_bt (internal debugging procedure).
Diffstat (limited to 'src/vhdl')
| -rw-r--r-- | src/vhdl/simulate/simul-debugger.adb | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/vhdl/simulate/simul-debugger.adb b/src/vhdl/simulate/simul-debugger.adb index 3ae364698..1a3c82245 100644 --- a/src/vhdl/simulate/simul-debugger.adb +++ b/src/vhdl/simulate/simul-debugger.adb @@ -937,6 +937,18 @@ package body Simul.Debugger is New_Line; end Disp_A_Frame; + procedure Debug_Bt (Instance : Block_Instance_Acc) + is + Inst : Block_Instance_Acc; + begin + Inst := Instance; + while Inst /= null loop + Disp_A_Frame (Inst); + Inst := Inst.Parent; + end loop; + end Debug_Bt; + pragma Unreferenced (Debug_Bt); + procedure Disp_Current_Lines is use Files_Map; |