vhdl: move parse package as vhdl child.

7 files changed, 19 insertions, 19 deletions

diff --git a/src/vhdl/sem_assocs.adb b/src/vhdl/sem_assocs.adb
index fe7f9542b..b04962c58 100644
--- a/src/vhdl/sem_assocs.adb
+++ b/src/vhdl/sem_assocs.adb
@@ -20,7 +20,7 @@ with Errorout; use Errorout;
 with Flags; use Flags;
 with Types; use Types;
 with Iirs_Utils; use Iirs_Utils;
-with Parse;
+with Vhdl.Parse;
 with Std_Names;
 with Sem_Names; use Sem_Names;
 with Sem_Types;
@@ -83,7 +83,7 @@ package body Sem_Assocs is
          when Iir_Kinds_Interface_Subprogram_Declaration =>
             N_Assoc := Create_Iir (Iir_Kind_Association_Element_Subprogram);
             if Get_Kind (Actual) = Iir_Kind_String_Literal8 then
-               Actual := Parse.String_To_Operator_Symbol (Actual);
+               Actual := Vhdl.Parse.String_To_Operator_Symbol (Actual);
             end if;
          when others =>
             Error_Kind ("rewrite_non_object_association", Inter);
diff --git a/src/vhdl/sem_lib.adb b/src/vhdl/sem_lib.adb
index 6cf642f2f..afc54cbf3 100644
--- a/src/vhdl/sem_lib.adb
+++ b/src/vhdl/sem_lib.adb
@@ -22,7 +22,7 @@ with Iirs_Utils; use Iirs_Utils;
 with Errorout; use Errorout;
 with Libraries; use Libraries;
 with Vhdl.Scanner;
-with Parse;
+with Vhdl.Parse;
 with Disp_Tree;
 with Disp_Vhdl;
 with Sem;
@@ -46,7 +46,7 @@ package body Sem_Lib is
          --  as an identifier, which is not valid at the beginning of a file.
          Res := Null_Iir;
       else
-         Res := Parse.Parse_Design_File;
+         Res := Vhdl.Parse.Parse_Design_File;
       end if;
       Vhdl.Scanner.Close_File;
 
@@ -207,7 +207,7 @@ package body Sem_Lib is
 
       --  Parse
       Scan;
-      Res := Parse.Parse_Design_Unit;
+      Res := Vhdl.Parse.Parse_Design_Unit;
       Close_File;
       if Res = Null_Iir then
          raise Compilation_Error;
diff --git a/src/vhdl/simulate/simul-debugger.adb b/src/vhdl/simulate/simul-debugger.adb
index c257b909d..82eec793e 100644
--- a/src/vhdl/simulate/simul-debugger.adb
+++ b/src/vhdl/simulate/simul-debugger.adb
@@ -23,7 +23,7 @@ with Types; use Types;
 with Name_Table;
 with Str_Table;
 with Files_Map;
-with Parse;
+with Vhdl.Parse;
 with Vhdl.Scanner;
 with Vhdl.Tokens;
 with Sem_Expr;
@@ -1337,7 +1337,8 @@ package body Simul.Debugger is
                Len := Len + 1;
                P := P + 1;
             end loop;
-            Break_Id := Parse.Str_To_Operator_Name (Str, Len, No_Location);
+            Break_Id := Vhdl.Parse.Str_To_Operator_Name
+              (Str, Len, No_Location);
             --  FIXME: free string.
             --  FIXME: catch error.
          end;
@@ -1901,7 +1902,7 @@ package body Simul.Debugger is
          Line (P .. Line'Last));
       Vhdl.Scanner.Set_File (File);
       Vhdl.Scanner.Scan;
-      Expr := Parse.Parse_Expression;
+      Expr := Vhdl.Parse.Parse_Expression;
       if Vhdl.Scanner.Current_Token /= Tok_Eof then
          Put_Line ("garbage at end of expression ignored");
       end if;
diff --git a/src/vhdl/parse.adb b/src/vhdl/vhdl-parse.adb
index a5875e5c5..fc45ff965 100644
--- a/src/vhdl/parse.adb
+++ b/src/vhdl/vhdl-parse.adb
@@ -22,7 +22,7 @@ with Iirs_Utils; use Iirs_Utils;
 with Errorout; use Errorout;
 with Std_Names; use Std_Names;
 with Flags; use Flags;
-with Parse_Psl;
+with Vhdl.Parse_Psl;
 with Str_Table;
 with Xrefs;
 with Elocations; use Elocations;
@@ -44,8 +44,7 @@ with Elocations; use Elocations;
 --    'a token' means the current token was analysed.
 --    'next token' means the current token is to be analysed.
 
-
-package body Parse is
+package body Vhdl.Parse is
 
    -- current_token must be valid.
    -- Leaves a token.
@@ -9869,4 +9868,4 @@ package body Parse is
 
       return Res;
    end Parse_Design_File;
-end Parse;
+end Vhdl.Parse;
diff --git a/src/vhdl/parse.ads b/src/vhdl/vhdl-parse.ads
index 8204a2d0e..c399fc475 100644
--- a/src/vhdl/parse.ads
+++ b/src/vhdl/vhdl-parse.ads
@@ -18,7 +18,7 @@
 with Types; use Types;
 with Iirs; use Iirs;
 
-package Parse is
+package Vhdl.Parse is
    --  If True, create nodes for parenthesis expressions.
    Flag_Parse_Parenthesis : Boolean := False;
 
@@ -60,4 +60,4 @@ package Parse is
    --  The scanner must have been initialized as for parse_design_unit.
    --  Return Null_Iir in case of error.
    function Parse_Design_File return Iir_Design_File;
-end Parse;
+end Vhdl.Parse;
diff --git a/src/vhdl/parse_psl.adb b/src/vhdl/vhdl-parse_psl.adb
index 5d78efba6..f20094231 100644
--- a/src/vhdl/parse_psl.adb
+++ b/src/vhdl/vhdl-parse_psl.adb
@@ -22,9 +22,9 @@ with Iirs;
 with Vhdl.Scanner; use Vhdl.Scanner;
 with PSL.Errors; use PSL.Errors;
 with PSL.Priorities; use PSL.Priorities;
-with Parse;
+with Vhdl.Parse;
 
-package body Parse_Psl is
+package body Vhdl.Parse_Psl is
    procedure Error_Msg_Parse (Msg: String) is
    begin
       Report_Msg (Msgid_Error, Errorout.Parse, No_Location, Msg);
@@ -864,4 +864,4 @@ package body Parse_Psl is
    begin
       return Get_Parameter_List (N) = Null_Node;
    end Is_Instantiated_Declaration;
-end Parse_Psl;
+end Vhdl.Parse_Psl;
diff --git a/src/vhdl/parse_psl.ads b/src/vhdl/vhdl-parse_psl.ads
index c24e65091..717663ecc 100644
--- a/src/vhdl/parse_psl.ads
+++ b/src/vhdl/vhdl-parse_psl.ads
@@ -19,7 +19,7 @@
 with Types; use Types;
 with Vhdl.Tokens; use Vhdl.Tokens;
 
-package Parse_Psl is
+package Vhdl.Parse_Psl is
    function Parse_Psl_Sequence (Full_Hdl_Expr : Boolean) return PSL_Node;
    function Parse_Psl_Property return PSL_Node;
    function Parse_Psl_Boolean return PSL_Node;
@@ -27,4 +27,4 @@ package Parse_Psl is
 
    --  True if endpoint declaration N is instantiated (ie has no parameters).
    function Is_Instantiated_Declaration (N : PSL_Node) return Boolean;
-end Parse_Psl;
+end Vhdl.Parse_Psl;