aboutsummaryrefslogtreecommitdiffstats
path: root/src/vhdl
diff options
context:
space:
mode:
authorTristan Gingold <tgingold@free.fr>2022-07-28 07:45:13 +0200
committerTristan Gingold <tgingold@free.fr>2022-07-28 08:06:13 +0200
commitc46da99e4230131af5a52700740d6f79f034b775 (patch)
tree3f2ebcb236362ad592ae8c9b905e5bc59a859999 /src/vhdl
parent3976d0f60b3ab41d91767e30ee972ad8ded426a1 (diff)
downloadghdl-c46da99e4230131af5a52700740d6f79f034b775.tar.gz
ghdl-c46da99e4230131af5a52700740d6f79f034b775.tar.bz2
ghdl-c46da99e4230131af5a52700740d6f79f034b775.zip
vhdl-sem_names: allow element attribute on element attribute. Fix #2141
Diffstat (limited to 'src/vhdl')
-rw-r--r--src/vhdl/translate/trans-chap4.adb29
-rw-r--r--src/vhdl/translate/trans-chap8.adb2
-rw-r--r--src/vhdl/vhdl-sem_names.adb18
-rw-r--r--src/vhdl/vhdl-utils.adb2
4 files changed, 34 insertions, 17 deletions
diff --git a/src/vhdl/translate/trans-chap4.adb b/src/vhdl/translate/trans-chap4.adb
index 699f4acc9..a536fb07c 100644
--- a/src/vhdl/translate/trans-chap4.adb
+++ b/src/vhdl/translate/trans-chap4.adb
@@ -453,25 +453,36 @@ package body Trans.Chap4 is
Iir_Kind_Element_Attribute);
end Is_Object_Type_Attribute;
- procedure Elab_Subtype_Attribute
- (Decl : Iir; Name_Val : Mnode; Name_Sig : Mnode)
+ -- Handle 'Subtype or 'Element, return the bounds.
+ function Type_Attribute_To_Bounds (Attr : Iir) return Mnode
is
- Ind : constant Iir := Get_Subtype_Indication (Decl);
+ Pfx : constant Iir := Get_Prefix (Attr);
Name : Mnode;
Bnd : Mnode;
begin
- Name := Chap6.Translate_Name (Get_Prefix (Ind), Mode_Value);
- Bnd := Chap3.Get_Composite_Bounds (Name);
- case Get_Kind (Ind) is
+ if Get_Kind (Pfx) = Iir_Kind_Element_Attribute then
+ Bnd := Type_Attribute_To_Bounds (Pfx);
+ else
+ Name := Chap6.Translate_Name (Pfx, Mode_Value);
+ Bnd := Chap3.Get_Composite_Bounds (Name);
+ end if;
+
+ case Get_Kind (Attr) is
when Iir_Kind_Subtype_Attribute =>
- null;
+ return Bnd;
when Iir_Kind_Element_Attribute =>
- Bnd := Chap3.Array_Bounds_To_Element_Bounds
- (Bnd, Get_Type (Get_Prefix (Ind)));
+ return Chap3.Array_Bounds_To_Element_Bounds (Bnd, Get_Type (Pfx));
when others =>
raise Internal_Error;
end case;
+ end Type_Attribute_To_Bounds;
+ procedure Elab_Subtype_Attribute
+ (Decl : Iir; Name_Val : Mnode; Name_Sig : Mnode)
+ is
+ Bnd : Mnode;
+ begin
+ Bnd := Type_Attribute_To_Bounds (Get_Subtype_Indication (Decl));
if Name_Sig /= Mnode_Null then
Stabilize (Bnd);
New_Assign_Stmt (M2Lp (Chap3.Get_Composite_Bounds (Name_Sig)),
diff --git a/src/vhdl/translate/trans-chap8.adb b/src/vhdl/translate/trans-chap8.adb
index 05cac2c56..56f985adc 100644
--- a/src/vhdl/translate/trans-chap8.adb
+++ b/src/vhdl/translate/trans-chap8.adb
@@ -473,6 +473,8 @@ package body Trans.Chap8 is
null;
when Iir_Kind_Subtype_Declaration =>
null;
+ when Iir_Kind_Element_Attribute =>
+ null;
when others =>
Error_Kind ("is_for_loop_iterator_stable(2)", Name);
end case;
diff --git a/src/vhdl/vhdl-sem_names.adb b/src/vhdl/vhdl-sem_names.adb
index 3993cae22..1847b6205 100644
--- a/src/vhdl/vhdl-sem_names.adb
+++ b/src/vhdl/vhdl-sem_names.adb
@@ -3858,23 +3858,25 @@ package body Vhdl.Sem_Names is
in Iir_Kinds_Object_Declaration)
then
Attr_Type := Get_Type (Prefix_Name);
- elsif (Get_Kind (Get_Base_Name (Prefix_Name))
- in Iir_Kinds_Type_Declaration)
- then
- Attr_Type := Get_Type (Get_Base_Name (Prefix_Name));
+ Attr_Subtype := Get_Element_Subtype (Attr_Type);
else
- Error_Msg_Sem (+Attr, "prefix must denote an object or a type");
+ Attr_Type := Is_Type_Name (Prefix_Name);
+ if Attr_Type /= Null_Iir then
+ Attr_Subtype := Get_Element_Subtype (Attr_Type);
+ else
+ Error_Msg_Sem (+Attr, "prefix must denote an object or a type");
+ Attr_Subtype := Create_Error_Type (Attr);
+ end if;
end if;
- if False and not Is_Array_Type (Attr_Type) then
+ if False and then not Is_Array_Type (Attr_Type) then
Error_Msg_Sem (+Attr, "prefix must denote an array");
end if;
-- The type defined by 'element is always constrained. Create
-- a subtype if it is not.
-- NO, it isn't. The prefix can be a type.
- Attr_Subtype := Get_Element_Subtype (Attr_Type);
- if False and not Is_Fully_Constrained_Type (Attr_Subtype) then
+ if False and then not Is_Fully_Constrained_Type (Attr_Subtype) then
Attr_Subtype :=
Sem_Types.Build_Constrained_Subtype (Attr_Subtype, Attr);
end if;
diff --git a/src/vhdl/vhdl-utils.adb b/src/vhdl/vhdl-utils.adb
index 800a0c9df..729e7352b 100644
--- a/src/vhdl/vhdl-utils.adb
+++ b/src/vhdl/vhdl-utils.adb
@@ -1213,6 +1213,8 @@ package body Vhdl.Utils is
end case;
when Iir_Kind_Subtype_Attribute =>
return Get_Type (Ent);
+ when Iir_Kind_Element_Attribute =>
+ return Get_Type (Name);
when others =>
return Null_Iir;
end case;