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author | Tristan Gingold <tgingold@free.fr> | 2019-09-13 20:21:46 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-09-13 20:21:46 +0200 |
commit | 1ff70cdd479751f646b7da61287bc15859563fe0 (patch) | |
tree | 2e7a97c78fcd45800230436118790ad671005a9a /src | |
parent | 32fee63a7b9d7fd5b86c1efc7280441e7d0dbf1f (diff) | |
download | ghdl-1ff70cdd479751f646b7da61287bc15859563fe0.tar.gz ghdl-1ff70cdd479751f646b7da61287bc15859563fe0.tar.bz2 ghdl-1ff70cdd479751f646b7da61287bc15859563fe0.zip |
synth-stmts: fix uninitialized variable.
Diffstat (limited to 'src')
-rw-r--r-- | src/synth/synth-stmts.adb | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/synth/synth-stmts.adb b/src/synth/synth-stmts.adb index 6c616af69..cc8ae6da3 100644 --- a/src/synth/synth-stmts.adb +++ b/src/synth/synth-stmts.adb @@ -1416,7 +1416,15 @@ package body Synth.Stmts is M : Areapools.Mark_Type; C : Seq_Context; begin - C.Inst := Make_Instance (Syn_Inst, Info); + C := (Inst => Make_Instance (Syn_Inst, Info), + T_En => True, + W_En => No_Wire_Id, + W_Ret => No_Wire_Id, + W_Val => No_Wire_Id, + Ret_Init => No_Net, + Ret_Value => null, + Ret_Typ => null, + Nbr_Ret => 0); Mark (M, Proc_Pool); Instance_Pool := Proc_Pool'Access; |