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authorTristan Gingold <tgingold@free.fr>2019-07-12 19:43:04 +0200
committerTristan Gingold <tgingold@free.fr>2019-07-13 08:03:52 +0200
commit570d86eaa2b114930a6e21d1b3ec7b6b4f0b83ea (patch)
tree6dbc7e09b00739bdbf64f4ff7f8e14555830bf48 /src
parent61179df112a8a039dbf234eeb9dbfa7327a1f62c (diff)
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vhdl: cleanup in clear_instantiation_configuration.
Diffstat (limited to 'src')
-rw-r--r--src/vhdl/vhdl-canon.adb4
-rw-r--r--src/vhdl/vhdl-sem.adb2
-rw-r--r--src/vhdl/vhdl-utils.adb85
-rw-r--r--src/vhdl/vhdl-utils.ads2
4 files changed, 23 insertions, 70 deletions
diff --git a/src/vhdl/vhdl-canon.adb b/src/vhdl/vhdl-canon.adb
index 4db4b719e..4dbb03c4c 100644
--- a/src/vhdl/vhdl-canon.adb
+++ b/src/vhdl/vhdl-canon.adb
@@ -2900,7 +2900,7 @@ package body Vhdl.Canon is
Anon_Label : Natural;
begin
if Parent /= Null_Iir then
- Clear_Instantiation_Configuration (Parent, True);
+ Clear_Instantiation_Configuration (Parent);
end if;
Anon_Label := 0;
@@ -2976,7 +2976,7 @@ package body Vhdl.Canon is
-- FIXME: handle indexed/sliced name?
- Clear_Instantiation_Configuration (Blk, False);
+ Clear_Instantiation_Configuration (Blk);
-- 1) Configure instantiations with configuration specifications.
-- TODO: merge.
diff --git a/src/vhdl/vhdl-sem.adb b/src/vhdl/vhdl-sem.adb
index 6674af1b4..99e08d51f 100644
--- a/src/vhdl/vhdl-sem.adb
+++ b/src/vhdl/vhdl-sem.adb
@@ -1109,7 +1109,7 @@ package body Vhdl.Sem is
end;
-- VHDL 87: do not remove configuration specification in generate stmts.
- Clear_Instantiation_Configuration (Block, False);
+ Clear_Instantiation_Configuration (Block);
El := Get_Configuration_Item_Chain (Block_Conf);
while El /= Null_Iir loop
diff --git a/src/vhdl/vhdl-utils.adb b/src/vhdl/vhdl-utils.adb
index dffc7c903..43b3a8d92 100644
--- a/src/vhdl/vhdl-utils.adb
+++ b/src/vhdl/vhdl-utils.adb
@@ -16,7 +16,6 @@
-- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
-- 02111-1307, USA.
-with Flags; use Flags;
with Name_Table;
with Str_Table;
with Std_Names; use Std_Names;
@@ -645,38 +644,33 @@ package body Vhdl.Utils is
end case;
end Get_Unit_From_Dependence;
- procedure Clear_Instantiation_Configuration_Vhdl87
- (Parent : Iir; In_Generate : Boolean; Full : Boolean)
+ procedure Clear_Instantiation_Configuration (Parent : Iir)
is
El : Iir;
- Prev : Iir;
begin
El := Get_Concurrent_Statement_Chain (Parent);
while El /= Null_Iir loop
case Get_Kind (El) is
when Iir_Kind_Component_Instantiation_Statement =>
- if In_Generate and not Full then
- Prev := Get_Component_Configuration (El);
- if Prev /= Null_Iir then
- case Get_Kind (Prev) is
- when Iir_Kind_Configuration_Specification =>
- -- Keep it.
- null;
- when Iir_Kind_Component_Configuration =>
- Set_Component_Configuration (El, Null_Iir);
- when others =>
- Error_Kind
- ("clear_instantiation_configuration_vhdl87",
- Prev);
- end case;
- end if;
- else
- Set_Component_Configuration (El, Null_Iir);
- end if;
+ Set_Component_Configuration (El, Null_Iir);
when Iir_Kind_For_Generate_Statement =>
- Set_Generate_Block_Configuration (El, Null_Iir);
- -- Clear inside a generate statement.
- Clear_Instantiation_Configuration_Vhdl87 (El, True, Full);
+ declare
+ Bod : constant Iir := Get_Generate_Statement_Body (El);
+ begin
+ Set_Generate_Block_Configuration (Bod, Null_Iir);
+ end;
+ when Iir_Kind_If_Generate_Statement =>
+ declare
+ Clause : Iir;
+ Bod : Iir;
+ begin
+ Clause := El;
+ while Clause /= Null_Iir loop
+ Bod := Get_Generate_Statement_Body (Clause);
+ Set_Generate_Block_Configuration (Bod, Null_Iir);
+ Clause := Get_Generate_Else_Clause (Clause);
+ end loop;
+ end;
when Iir_Kind_Block_Statement =>
Set_Block_Block_Configuration (El, Null_Iir);
when others =>
@@ -684,47 +678,6 @@ package body Vhdl.Utils is
end case;
El := Get_Chain (El);
end loop;
- end Clear_Instantiation_Configuration_Vhdl87;
-
- procedure Clear_Instantiation_Configuration (Parent : Iir; Full : Boolean)
- is
- El : Iir;
- begin
- if False and then Flags.Vhdl_Std = Vhdl_87 then
- Clear_Instantiation_Configuration_Vhdl87
- (Parent, Get_Kind (Parent) = Iir_Kind_For_Generate_Statement, Full);
- else
- El := Get_Concurrent_Statement_Chain (Parent);
- while El /= Null_Iir loop
- case Get_Kind (El) is
- when Iir_Kind_Component_Instantiation_Statement =>
- Set_Component_Configuration (El, Null_Iir);
- when Iir_Kind_For_Generate_Statement =>
- declare
- Bod : constant Iir := Get_Generate_Statement_Body (El);
- begin
- Set_Generate_Block_Configuration (Bod, Null_Iir);
- end;
- when Iir_Kind_If_Generate_Statement =>
- declare
- Clause : Iir;
- Bod : Iir;
- begin
- Clause := El;
- while Clause /= Null_Iir loop
- Bod := Get_Generate_Statement_Body (Clause);
- Set_Generate_Block_Configuration (Bod, Null_Iir);
- Clause := Get_Generate_Else_Clause (Clause);
- end loop;
- end;
- when Iir_Kind_Block_Statement =>
- Set_Block_Block_Configuration (El, Null_Iir);
- when others =>
- null;
- end case;
- El := Get_Chain (El);
- end loop;
- end if;
end Clear_Instantiation_Configuration;
-- Get identifier of NODE as a string.
diff --git a/src/vhdl/vhdl-utils.ads b/src/vhdl/vhdl-utils.ads
index fabe48f81..e8b713799 100644
--- a/src/vhdl/vhdl-utils.ads
+++ b/src/vhdl/vhdl-utils.ads
@@ -126,7 +126,7 @@ package Vhdl.Utils is
-- Clear configuration field of all component instantiation of
-- the concurrent statements of PARENT.
- procedure Clear_Instantiation_Configuration (Parent : Iir; Full : Boolean);
+ procedure Clear_Instantiation_Configuration (Parent : Iir);
-- Free Node and its prefixes, if any.
procedure Free_Name (Node : Iir);