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author | Tristan Gingold <tgingold@free.fr> | 2021-11-11 04:56:10 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2021-11-11 04:56:10 +0100 |
commit | 6dcda18bb1e363cbd07ead329b3caf7f1467b9bc (patch) | |
tree | a5e656807a4ea7e4150e1f3b11fc0964a264e455 /src | |
parent | 1f3b1857bb01bc8ec0e50b9c0f6eb061dbfd782a (diff) | |
download | ghdl-6dcda18bb1e363cbd07ead329b3caf7f1467b9bc.tar.gz ghdl-6dcda18bb1e363cbd07ead329b3caf7f1467b9bc.tar.bz2 ghdl-6dcda18bb1e363cbd07ead329b3caf7f1467b9bc.zip |
vhdl: recognize ror/rol from ieee.numeric_std. For #1909
Diffstat (limited to 'src')
-rw-r--r-- | src/vhdl/vhdl-ieee-numeric.adb | 20 | ||||
-rw-r--r-- | src/vhdl/vhdl-nodes.ads | 4 |
2 files changed, 20 insertions, 4 deletions
diff --git a/src/vhdl/vhdl-ieee-numeric.adb b/src/vhdl/vhdl-ieee-numeric.adb index cfb617166..2e26eb187 100644 --- a/src/vhdl/vhdl-ieee-numeric.adb +++ b/src/vhdl/vhdl-ieee-numeric.adb @@ -542,11 +542,11 @@ package body Vhdl.Ieee.Numeric is (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Shf_Right_Sgn_Nat, Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Shf_Right_Uns_Nat); - Rol_Patterns : constant Shift_Pattern_Type := + Rotate_Left_Patterns : constant Shift_Pattern_Type := (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Rot_Left_Sgn_Nat, Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Rot_Left_Uns_Nat); - Ror_Patterns : constant Shift_Pattern_Type := + Rotate_Right_Patterns : constant Shift_Pattern_Type := (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Rot_Right_Sgn_Nat, Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Rot_Right_Uns_Nat); @@ -566,6 +566,14 @@ package body Vhdl.Ieee.Numeric is (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Sra_Sgn_Int, Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Sra_Uns_Int); + Rol_Patterns : constant Shift_Pattern_Type := + (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Rol_Sgn_Int, + Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Rol_Uns_Int); + + Ror_Patterns : constant Shift_Pattern_Type := + (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Ror_Sgn_Int, + Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Ror_Uns_Int); + Leftmost_Patterns : constant Shift_Pattern_Type := (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Find_Leftmost_Sgn, Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Find_Leftmost_Uns); @@ -971,10 +979,14 @@ package body Vhdl.Ieee.Numeric is Handle_Shift (Sla_Patterns, Type_Signed); when Name_Sra => Handle_Shift (Sra_Patterns, Type_Signed); + when Name_Rol => + Handle_Shift (Rol_Patterns, Type_Signed); + when Name_Ror => + Handle_Shift (Ror_Patterns, Type_Signed); when Name_Rotate_Left => - Handle_Shift (Rol_Patterns, Type_Unsigned); + Handle_Shift (Rotate_Left_Patterns, Type_Unsigned); when Name_Rotate_Right => - Handle_Shift (Ror_Patterns, Type_Unsigned); + Handle_Shift (Rotate_Right_Patterns, Type_Unsigned); when Name_Find_Leftmost => Handle_Find (Leftmost_Patterns); when Name_Find_Rightmost => diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 1295c59c1..a36566a5c 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5824,6 +5824,10 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Numeric_Std_Sla_Sgn_Int, Iir_Predefined_Ieee_Numeric_Std_Sra_Uns_Int, Iir_Predefined_Ieee_Numeric_Std_Sra_Sgn_Int, + Iir_Predefined_Ieee_Numeric_Std_Rol_Uns_Int, + Iir_Predefined_Ieee_Numeric_Std_Rol_Sgn_Int, + Iir_Predefined_Ieee_Numeric_Std_Ror_Uns_Int, + Iir_Predefined_Ieee_Numeric_Std_Ror_Sgn_Int, Iir_Predefined_Ieee_Numeric_Std_And_Uns_Uns, Iir_Predefined_Ieee_Numeric_Std_And_Sgn_Sgn, |