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authorTristan Gingold <tgingold@free.fr>2022-09-18 05:33:09 +0200
committerTristan Gingold <tgingold@free.fr>2022-09-18 05:33:09 +0200
commit8e7a8b63b190ca32f5f0606a04e56b9d5289ca47 (patch)
tree15f166e837d4c6ccb5b92705d963f1287166d890 /src
parentf3a6a541dd119cba285d0277a00e8def5f927d88 (diff)
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simul: handle type conversions in port associations
Diffstat (limited to 'src')
-rw-r--r--src/simul/simul-vhdl_simul.adb28
-rw-r--r--src/synth/synth-vhdl_expr.adb74
-rw-r--r--src/synth/synth-vhdl_expr.ads4
3 files changed, 57 insertions, 49 deletions
diff --git a/src/simul/simul-vhdl_simul.adb b/src/simul/simul-vhdl_simul.adb
index ebfdc17c8..b5f14a067 100644
--- a/src/simul/simul-vhdl_simul.adb
+++ b/src/simul/simul-vhdl_simul.adb
@@ -2452,26 +2452,32 @@ package body Simul.Vhdl_Simul is
function Execute_Assoc_Conversion (Inst : Synth_Instance_Acc;
Func : Node;
Val : Memtyp;
- Res_Typ : Type_Acc) return Memtyp is
+ Res_Typ : Type_Acc) return Memtyp
+ is
+ Res : Valtyp;
begin
case Get_Kind (Func) is
when Iir_Kind_Function_Call =>
+ Res := Exec_Resolution_Call (Inst, Get_Implementation (Func),
+ Create_Value_Memtyp (Val));
+ when Iir_Kind_Type_Conversion =>
declare
- Res : Valtyp;
+ Conv_Typ : constant Type_Acc :=
+ Get_Subtype_Object (Inst, Get_Type (Func));
begin
- Res := Exec_Resolution_Call (Inst, Get_Implementation (Func),
- Create_Value_Memtyp (Val));
- Res := Synth.Vhdl_Expr.Synth_Subtype_Conversion
- (Inst, Res, Res_Typ, False, Func);
- if Res = No_Valtyp then
- Grt.Errors.Fatal_Error;
- end if;
- Convert_Type_Width (Res.Typ);
- return Synth.Vhdl_Expr.Get_Value_Memtyp (Res);
+ Res := Synth.Vhdl_Expr.Synth_Type_Conversion
+ (Inst, Create_Value_Memtyp (Val), Conv_Typ, Func);
end;
when others =>
Vhdl.Errors.Error_Kind ("execute_assoc_conversion", Func);
end case;
+ Res := Synth.Vhdl_Expr.Synth_Subtype_Conversion
+ (Inst, Res, Res_Typ, False, Func);
+ if Res = No_Valtyp then
+ Grt.Errors.Fatal_Error;
+ end if;
+ Convert_Type_Width (Res.Typ);
+ return Synth.Vhdl_Expr.Get_Value_Memtyp (Res);
end Execute_Assoc_Conversion;
procedure Create_Shadow_Signal (Sig : Memory_Ptr;
diff --git a/src/synth/synth-vhdl_expr.adb b/src/synth/synth-vhdl_expr.adb
index 3775b3f7b..5698b7987 100644
--- a/src/synth/synth-vhdl_expr.adb
+++ b/src/synth/synth-vhdl_expr.adb
@@ -1387,21 +1387,13 @@ package body Synth.Vhdl_Expr is
return No_Net;
end Synth_Clock_Edge;
- function Synth_Type_Conversion
- (Syn_Inst : Synth_Instance_Acc; Conv : Node) return Valtyp
- is
- Expr : constant Node := Get_Expression (Conv);
- Conv_Type : constant Node := Get_Type (Conv);
- Conv_Typ : constant Type_Acc := Get_Subtype_Object (Syn_Inst, Conv_Type);
- Val : Valtyp;
+ function Synth_Type_Conversion (Syn_Inst : Synth_Instance_Acc;
+ Val : Valtyp;
+ Conv_Typ : Type_Acc;
+ Loc : Node) return Valtyp is
begin
- Val := Synth_Expression_With_Basetype (Syn_Inst, Expr);
- if Val = No_Valtyp then
- return No_Valtyp;
- end if;
- Strip_Const (Val);
- case Get_Kind (Conv_Type) is
- when Iir_Kind_Integer_Subtype_Definition =>
+ case Conv_Typ.Kind is
+ when Type_Discrete =>
if Val.Typ.Kind = Type_Discrete then
-- Int to int.
return Val;
@@ -1420,49 +1412,55 @@ package body Synth.Vhdl_Expr is
or V > Fp64 (Conv_Typ.Drange.Left);
end case;
if Err then
- Error_Msg_Synth (+Expr, "value out of range");
- Elab.Debugger.Debug_Error (Syn_Inst, Expr);
+ Error_Msg_Synth (+Loc, "value out of range");
+ Elab.Debugger.Debug_Error (Syn_Inst, Loc);
return No_Valtyp;
end if;
return Create_Value_Discrete (Int64 (V), Conv_Typ);
end;
else
- Error_Msg_Synth (+Conv, "unhandled type conversion (to int)");
+ Error_Msg_Synth (+Loc, "unhandled type conversion (to int)");
return No_Valtyp;
end if;
- when Iir_Kind_Floating_Subtype_Definition =>
+ when Type_Float =>
if Is_Static (Val.Val) then
return Create_Value_Float
(Fp64 (Read_Discrete (Val)), Conv_Typ);
else
- Error_Msg_Synth (+Conv, "unhandled type conversion (to float)");
+ Error_Msg_Synth (+Loc, "unhandled type conversion (to float)");
return No_Valtyp;
end if;
- when Iir_Kind_Array_Type_Definition
- | Iir_Kind_Array_Subtype_Definition =>
- case Conv_Typ.Kind is
- when Type_Vector
- | Type_Unbounded_Vector =>
- return Val;
- when Type_Array
- | Type_Unbounded_Array =>
- return Val;
- when others =>
- Error_Msg_Synth
- (+Conv, "unhandled type conversion (to array)");
- return No_Valtyp;
- end case;
- when Iir_Kind_Enumeration_Type_Definition
- | Iir_Kind_Enumeration_Subtype_Definition =>
- pragma Assert (Get_Base_Type (Get_Type (Expr))
- = Get_Base_Type (Conv_Type));
+ when Type_Vector
+ | Type_Unbounded_Vector =>
+ return Val;
+ when Type_Array
+ | Type_Unbounded_Array =>
+ return Val;
+ when Type_Bit
+ | Type_Logic =>
return Val;
when others =>
- Error_Msg_Synth (+Conv, "unhandled type conversion");
+ Error_Msg_Synth (+Loc, "unhandled type conversion");
return No_Valtyp;
end case;
end Synth_Type_Conversion;
+ function Synth_Type_Conversion
+ (Syn_Inst : Synth_Instance_Acc; Conv : Node) return Valtyp
+ is
+ Expr : constant Node := Get_Expression (Conv);
+ Conv_Type : constant Node := Get_Type (Conv);
+ Conv_Typ : constant Type_Acc := Get_Subtype_Object (Syn_Inst, Conv_Type);
+ Val : Valtyp;
+ begin
+ Val := Synth_Expression_With_Basetype (Syn_Inst, Expr);
+ if Val = No_Valtyp then
+ return No_Valtyp;
+ end if;
+ Strip_Const (Val);
+ return Synth_Type_Conversion (Syn_Inst, Val, Conv_Typ, Conv);
+ end Synth_Type_Conversion;
+
function Error_Ieee_Operator (Imp : Node; Loc : Node) return Boolean
is
use Std_Names;
diff --git a/src/synth/synth-vhdl_expr.ads b/src/synth/synth-vhdl_expr.ads
index 227e82e29..d4b27dc05 100644
--- a/src/synth/synth-vhdl_expr.ads
+++ b/src/synth/synth-vhdl_expr.ads
@@ -96,6 +96,10 @@ package Synth.Vhdl_Expr is
function Synth_Expression_With_Basetype (Syn_Inst : Synth_Instance_Acc;
Expr : Node) return Valtyp;
+ function Synth_Type_Conversion (Syn_Inst : Synth_Instance_Acc;
+ Val : Valtyp;
+ Conv_Typ : Type_Acc;
+ Loc : Node) return Valtyp;
function Synth_Type_Conversion
(Syn_Inst : Synth_Instance_Acc; Conv : Node) return Valtyp;