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author | Tristan Gingold <tgingold@free.fr> | 2020-10-07 18:51:44 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-10-07 18:51:44 +0200 |
commit | a9519dc6992a77e1de914aae9cb4a018f254ee27 (patch) | |
tree | 60ef4d0d7f7a929114d1626e188a7881a7daf1ae /src | |
parent | 7d519d803e7481bf1007b7177629776f99149f65 (diff) | |
download | ghdl-a9519dc6992a77e1de914aae9cb4a018f254ee27.tar.gz ghdl-a9519dc6992a77e1de914aae9cb4a018f254ee27.tar.bz2 ghdl-a9519dc6992a77e1de914aae9cb4a018f254ee27.zip |
synth: check instantiation inputs constraints.
Diffstat (limited to 'src')
-rw-r--r-- | src/synth/synth-insts.adb | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/src/synth/synth-insts.adb b/src/synth/synth-insts.adb index fe02de317..a49ee4838 100644 --- a/src/synth/synth-insts.adb +++ b/src/synth/synth-insts.adb @@ -711,6 +711,11 @@ package body Synth.Insts is Formal_Typ := Get_Subtype_Object (Inter_Inst, Get_Type (Inter)); Act := Synth_Expression_With_Type (Act_Inst, Actual, Formal_Typ); + Act := Synth_Subtype_Conversion + (Get_Build (Act_Inst), Act, Formal_Typ, False, Assoc); + if Act = No_Valtyp then + return No_Net; + end if; return Get_Net (Ctxt, Act); end Synth_Input_Assoc; @@ -798,6 +803,7 @@ package body Synth.Insts is Inter : Node; Nbr_Inputs : Port_Nbr; Nbr_Outputs : Port_Nbr; + N : Net; begin Assoc := Ports_Assoc; Assoc_Inter := Get_Port_Chain (Inst_Obj.Decl); @@ -810,9 +816,11 @@ package body Synth.Insts is case Mode_To_Port_Kind (Get_Mode (Inter)) is when Port_In => -- Connect the net to the input. - Connect (Get_Input (Inst, Nbr_Inputs), - Synth_Input_Assoc - (Syn_Inst, Assoc, Inst_Obj.Syn_Inst, Inter)); + N := Synth_Input_Assoc + (Syn_Inst, Assoc, Inst_Obj.Syn_Inst, Inter); + if N /= No_Net then + Connect (Get_Input (Inst, Nbr_Inputs), N); + end if; Nbr_Inputs := Nbr_Inputs + 1; when Port_Out | Port_Inout => |