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author | Tristan Gingold <tgingold@free.fr> | 2020-03-29 09:01:19 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-03-29 09:01:19 +0200 |
commit | c742f92ae4a1f8363a3a9df34f7ba3f251b3c971 (patch) | |
tree | 16736d947d436adc8f2cdf42a3cfa7c3619d1afc /src | |
parent | 9f6ac61e196ccf49960bbdb2e7d71cdd96ddd10d (diff) | |
download | ghdl-c742f92ae4a1f8363a3a9df34f7ba3f251b3c971.tar.gz ghdl-c742f92ae4a1f8363a3a9df34f7ba3f251b3c971.tar.bz2 ghdl-c742f92ae4a1f8363a3a9df34f7ba3f251b3c971.zip |
synth: add one more operation (or_reduce for suv).
Diffstat (limited to 'src')
-rw-r--r-- | src/synth/synth-oper.adb | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/synth/synth-oper.adb b/src/synth/synth-oper.adb index d6a425bb0..08892424d 100644 --- a/src/synth/synth-oper.adb +++ b/src/synth/synth-oper.adb @@ -1575,7 +1575,8 @@ package body Synth.Oper is when Iir_Predefined_Ieee_Numeric_Std_Max_Int_Sgn => return Synth_Dyadic_Int_Sgn (Id_Smax, L, R, Expr); - when Iir_Predefined_Ieee_Std_Logic_Misc_Or_Reduce_Slv => + when Iir_Predefined_Ieee_Std_Logic_Misc_Or_Reduce_Slv + | Iir_Predefined_Ieee_Std_Logic_Misc_Or_Reduce_Suv => return Create_Value_Net (Build_Reduce (Ctxt, Id_Red_Or, Get_Net (L)), Res_Typ); |