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authorTristan Gingold <tgingold@free.fr>2021-11-17 21:22:02 +0100
committerTristan Gingold <tgingold@free.fr>2021-11-17 21:22:02 +0100
commite890899a52b1b879694a41759e7644613d7bd1a6 (patch)
tree17c2639eeb58f90eec82c4d21b2c7364543d50e9 /src
parent4ac40b32c52686bb2c84b640d25d71919cafdf0e (diff)
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synth: renaming to instance_attributes.
Diffstat (limited to 'src')
-rw-r--r--src/synth/include/synth.h6
-rw-r--r--src/synth/netlists-cleanup.adb6
-rw-r--r--src/synth/netlists-disp_verilog.adb4
-rw-r--r--src/synth/netlists-disp_vhdl.adb11
-rw-r--r--src/synth/netlists-dump.adb19
-rw-r--r--src/synth/netlists-memories.adb2
-rw-r--r--src/synth/netlists-utils.adb14
-rw-r--r--src/synth/netlists-utils.ads2
-rw-r--r--src/synth/netlists.adb52
-rw-r--r--src/synth/netlists.ads20
-rw-r--r--src/synth/synth-vhdl_decls.adb2
11 files changed, 72 insertions, 66 deletions
diff --git a/src/synth/include/synth.h b/src/synth/include/synth.h
index fa6b78e2c..21144e32f 100644
--- a/src/synth/include/synth.h
+++ b/src/synth/include/synth.h
@@ -133,9 +133,9 @@ namespace GhdlSynth {
GHDLSYNTH_ADA_WRAPPER_WW(get_next_sink, Input, Input);
struct Attribute { unsigned int id; };
- GHDLSYNTH_ADA_WRAPPER_WW(get_first_attribute, Attribute, Instance);
- GHDLSYNTH_ADA_WRAPPER_WWD(get_first_input_port_attribute, Attribute, Module, Port_Idx);
- GHDLSYNTH_ADA_WRAPPER_WWD(get_first_output_port_attribute, Attribute, Module, Port_Idx);
+ GHDLSYNTH_ADA_WRAPPER_WW(get_instance_first_attribute, Attribute, Instance);
+ GHDLSYNTH_ADA_WRAPPER_WWD(get_input_port_first_attribute, Attribute, Module, Port_Idx);
+ GHDLSYNTH_ADA_WRAPPER_WWD(get_output_port_first_attribute, Attribute, Module, Port_Idx);
GHDLSYNTH_ADA_WRAPPER_WW(get_attribute_name, Name_Id, Attribute);
GHDLSYNTH_ADA_WRAPPER_DW(get_attribute_type, Param_Type, Attribute);
GHDLSYNTH_ADA_WRAPPER_WW(get_attribute_pval, Pval, Attribute);
diff --git a/src/synth/netlists-cleanup.adb b/src/synth/netlists-cleanup.adb
index c87c10fcc..c2fc603b4 100644
--- a/src/synth/netlists-cleanup.adb
+++ b/src/synth/netlists-cleanup.adb
@@ -163,7 +163,7 @@ package body Netlists.Cleanup is
| Id_Enable
| Id_Nop =>
-- Keep gates with an attribute.
- if not Has_Attribute (Inst) then
+ if not Has_Instance_Attribute (Inst) then
Remove_Output_Gate (Inst);
end if;
when others =>
@@ -180,11 +180,11 @@ package body Netlists.Cleanup is
Val : Pval;
V, V1 : Logic_32;
begin
- if not Has_Attribute (Inst) then
+ if not Has_Instance_Attribute (Inst) then
return False;
end if;
- Attr := Get_First_Attribute (Inst);
+ Attr := Get_Instance_First_Attribute (Inst);
while Attr /= No_Attribute loop
if Get_Attribute_Name (Attr) = Std_Names.Name_Keep then
Val := Get_Attribute_Pval (Attr);
diff --git a/src/synth/netlists-disp_verilog.adb b/src/synth/netlists-disp_verilog.adb
index f4c070232..b6ceece5a 100644
--- a/src/synth/netlists-disp_verilog.adb
+++ b/src/synth/netlists-disp_verilog.adb
@@ -1288,12 +1288,12 @@ package body Netlists.Disp_Verilog is
begin
First := True;
for I in 1 .. Get_Nbr_Inputs (M) loop
- Attr := Get_First_Input_Port_Attribute (M, I - 1);
+ Attr := Get_Input_Port_First_Attribute (M, I - 1);
Disp_Module_Port (Get_Input_Desc (M, I - 1), Port_In, Attr, First);
end loop;
for I in 1 .. Get_Nbr_Outputs (M) loop
Desc := Get_Output_Desc (M, I - 1);
- Attr := Get_First_Output_Port_Attribute (M, I - 1);
+ Attr := Get_Output_Port_First_Attribute (M, I - 1);
if Desc.Is_Inout then
Disp_Module_Port (Desc, Port_Inout, Attr, First);
else
diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb
index 79e86bc36..4fafdda69 100644
--- a/src/synth/netlists-disp_vhdl.adb
+++ b/src/synth/netlists-disp_vhdl.adb
@@ -1458,7 +1458,8 @@ package body Netlists.Disp_Vhdl is
procedure Disp_Architecture_Attributes (M : Module)
is
- Attrs : constant Attribute_Map_Acc := Get_Attributes (M);
+ Attrs : constant Instances_Attribute_Map_Acc :=
+ Get_Instance_Attributes (M);
Attr : Attribute;
Inst : Instance;
Kind : Param_Type;
@@ -1469,11 +1470,11 @@ package body Netlists.Disp_Vhdl is
return;
end if;
- for I in
- Attribute_Maps.First_Index .. Attribute_Maps.Last_Index (Attrs.all)
+ for I in Instances_Attribute_Maps.First_Index
+ .. Instances_Attribute_Maps.Last_Index (Attrs.all)
loop
- Attr := Attribute_Maps.Get_Value (Attrs.all, I);
- Inst := Attribute_Maps.Get_By_Index (Attrs.all, I);
+ Attr := Instances_Attribute_Maps.Get_Value (Attrs.all, I);
+ Inst := Instances_Attribute_Maps.Get_By_Index (Attrs.all, I);
while Attr /= No_Attribute loop
Put (" -- attribute ");
Put_Id (Get_Attribute_Name (Attr));
diff --git a/src/synth/netlists-dump.adb b/src/synth/netlists-dump.adb
index 4007e0e24..bd9554839 100644
--- a/src/synth/netlists-dump.adb
+++ b/src/synth/netlists-dump.adb
@@ -311,7 +311,8 @@ package body Netlists.Dump is
procedure Dump_Attributes (M : Module; Indent : Natural := 0)
is
- Attrs : constant Attribute_Map_Acc := Get_Attributes (M);
+ Attrs : constant Instances_Attribute_Map_Acc :=
+ Get_Instance_Attributes (M);
Attr : Attribute;
Inst : Instance;
Kind : Param_Type;
@@ -322,13 +323,13 @@ package body Netlists.Dump is
return;
end if;
- for I in
- Attribute_Maps.First_Index .. Attribute_Maps.Last_Index (Attrs.all)
+ for I in Instances_Attribute_Maps.First_Index
+ .. Instances_Attribute_Maps.Last_Index (Attrs.all)
loop
- Attr := Attribute_Maps.Get_Value (Attrs.all, I);
- Inst := Attribute_Maps.Get_By_Index (Attrs.all, I);
+ Attr := Instances_Attribute_Maps.Get_Value (Attrs.all, I);
+ Inst := Instances_Attribute_Maps.Get_By_Index (Attrs.all, I);
while Attr /= No_Attribute loop
- pragma Assert (Has_Attribute (Inst));
+ pragma Assert (Has_Instance_Attribute (Inst));
Put_Indent (Indent);
Put ("attribute ");
@@ -528,7 +529,7 @@ package body Netlists.Dump is
if Get_Nbr_Outputs (Inst) /= 1 then
return False;
end if;
- if Has_Attribute (Inst) then
+ if Has_Instance_Attribute (Inst) then
return False;
end if;
O := Get_Output (Inst, 0);
@@ -632,13 +633,13 @@ package body Netlists.Dump is
Disp_Instance_Id (Inst);
- if Has_Attribute (Inst) then
+ if Has_Instance_Attribute (Inst) then
declare
Attr : Attribute;
Kind : Param_Type;
Val : Pval;
begin
- Attr := Get_First_Attribute (Inst);
+ Attr := Get_Instance_First_Attribute (Inst);
Put ("(* ");
loop
Put_Id (Get_Attribute_Name (Attr));
diff --git a/src/synth/netlists-memories.adb b/src/synth/netlists-memories.adb
index 0b8d62f84..9f89adaa0 100644
--- a/src/synth/netlists-memories.adb
+++ b/src/synth/netlists-memories.adb
@@ -2284,7 +2284,7 @@ package body Netlists.Memories is
when others =>
raise Internal_Error;
end case;
- Copy_Attributes (Heads (I), Sig);
+ Copy_Instance_Attributes (Heads (I), Sig);
Tails (I) := Get_Output (Heads (I), 0);
end;
end loop;
diff --git a/src/synth/netlists-utils.adb b/src/synth/netlists-utils.adb
index 236602fac..45e498663 100644
--- a/src/synth/netlists-utils.adb
+++ b/src/synth/netlists-utils.adb
@@ -283,19 +283,19 @@ package body Netlists.Utils is
Get_Input_Net (Rinst, 0));
end Same_Clock;
- procedure Copy_Attributes (Dest : Instance; Src : Instance)
+ procedure Copy_Instance_Attributes (Dest : Instance; Src : Instance)
is
Attr : Attribute;
begin
- Attr := Get_First_Attribute (Src);
+ Attr := Get_Instance_First_Attribute (Src);
while Attr /= No_Attribute loop
- Set_Attribute (Dest,
- Get_Attribute_Name (Attr),
- Get_Attribute_Type (Attr),
- Get_Attribute_Pval (Attr));
+ Set_Instance_Attribute (Dest,
+ Get_Attribute_Name (Attr),
+ Get_Attribute_Type (Attr),
+ Get_Attribute_Pval (Attr));
Attr := Get_Attribute_Next (Attr);
end loop;
- end Copy_Attributes;
+ end Copy_Instance_Attributes;
function Clog2 (W : Width) return Width is
begin
diff --git a/src/synth/netlists-utils.ads b/src/synth/netlists-utils.ads
index 7ef000685..29d747b94 100644
--- a/src/synth/netlists-utils.ads
+++ b/src/synth/netlists-utils.ads
@@ -98,7 +98,7 @@ package Netlists.Utils is
function Clog2 (W : Width) return Width;
-- Copy attribtues of SRC to DEST.
- procedure Copy_Attributes (Dest : Instance; Src : Instance);
+ procedure Copy_Instance_Attributes (Dest : Instance; Src : Instance);
-- Used at many places.
package Net_Tables is new Dyn_Tables
diff --git a/src/synth/netlists.adb b/src/synth/netlists.adb
index 0a0a560ed..976334b32 100644
--- a/src/synth/netlists.adb
+++ b/src/synth/netlists.adb
@@ -1197,19 +1197,19 @@ package body Netlists is
Table_Low_Bound => 0,
Table_Initial => 64);
- procedure Set_Attribute
+ procedure Set_Instance_Attribute
(Inst : Instance; Id : Name_Id; Ptype : Param_Type; Pv : Pval)
is
pragma Assert (Is_Valid (Inst));
M : constant Module := Get_Instance_Parent (Inst);
Module_Rec : Module_Record renames Modules_Table.Table (M);
Attr : Attribute;
- Idx : Attribute_Maps.Index_Type;
+ Idx : Instances_Attribute_Maps.Index_Type;
Prev : Attribute;
begin
if Module_Rec.Attrs = null then
- Module_Rec.Attrs := new Attribute_Maps.Instance;
- Attribute_Maps.Init (Module_Rec.Attrs.all);
+ Module_Rec.Attrs := new Instances_Attribute_Maps.Instance;
+ Instances_Attribute_Maps.Init (Module_Rec.Attrs.all);
end if;
-- There is now at least one attribute for INST.
@@ -1217,47 +1217,49 @@ package body Netlists is
-- Get (or create and get) an entry for INST. If created, it will be
-- No_Attribute (returned by attribute_build_value).
- Attribute_Maps.Get_Index (Module_Rec.Attrs.all, Inst, Idx);
+ Instances_Attribute_Maps.Get_Index (Module_Rec.Attrs.all, Inst, Idx);
- Prev := Attribute_Maps.Get_Value (Module_Rec.Attrs.all, Idx);
+ Prev := Instances_Attribute_Maps.Get_Value (Module_Rec.Attrs.all, Idx);
Attributes_Table.Append ((Name => Id,
Typ => Ptype,
Val => Pv,
Chain => Prev));
Attr := Attributes_Table.Last;
- Attribute_Maps.Set_Value (Module_Rec.Attrs.all, Idx, Attr);
- end Set_Attribute;
+ Instances_Attribute_Maps.Set_Value (Module_Rec.Attrs.all, Idx, Attr);
+ end Set_Instance_Attribute;
- function Get_Attributes (M : Module) return Attribute_Map_Acc is
+ function Get_Instance_Attributes (M : Module)
+ return Instances_Attribute_Map_Acc is
begin
return Modules_Table.Table (M).Attrs;
- end Get_Attributes;
+ end Get_Instance_Attributes;
- function Has_Attribute (Inst : Instance) return Boolean is
+ function Has_Instance_Attribute (Inst : Instance) return Boolean is
begin
return Instances_Table.Table (Inst).Has_Attr;
- end Has_Attribute;
+ end Has_Instance_Attribute;
- function Get_First_Attribute (Inst : Instance) return Attribute
+ function Get_Instance_First_Attribute (Inst : Instance) return Attribute
is
pragma Assert (Is_Valid (Inst));
begin
- if not Has_Attribute (Inst) then
+ if not Has_Instance_Attribute (Inst) then
return No_Attribute;
end if;
declare
- M : constant Module := Get_Instance_Parent (Inst);
- Attrs : constant Attribute_Map_Acc := Get_Attributes (M);
- Idx : Attribute_Maps.Index_Type;
- Res : Attribute;
+ M : constant Module := Get_Instance_Parent (Inst);
+ Attrs : constant Instances_Attribute_Map_Acc :=
+ Get_Instance_Attributes (M);
+ Idx : Instances_Attribute_Maps.Index_Type;
+ Res : Attribute;
begin
pragma Assert (Attrs /= null);
- Attribute_Maps.Get_Index (Attrs.all, Inst, Idx);
- Res := Attribute_Maps.Get_Value (Attrs.all, Idx);
+ Instances_Attribute_Maps.Get_Index (Attrs.all, Inst, Idx);
+ Res := Instances_Attribute_Maps.Get_Value (Attrs.all, Idx);
return Res;
end;
- end Get_First_Attribute;
+ end Get_Instance_First_Attribute;
function Is_Valid (Attr : Attribute) return Boolean is
begin
@@ -1375,23 +1377,23 @@ package body Netlists is
return Res;
end Get_Port_First_Attribute;
- function Get_First_Input_Port_Attribute (M : Module; Port : Port_Idx)
+ function Get_Input_Port_First_Attribute (M : Module; Port : Port_Idx)
return Attribute
is
Idx : constant Port_Desc_Idx :=
Get_Input_First_Desc (M) + Port_Desc_Idx (Port);
begin
return Get_Port_First_Attribute (Idx);
- end Get_First_Input_Port_Attribute;
+ end Get_Input_Port_First_Attribute;
- function Get_First_Output_Port_Attribute (M : Module; Port : Port_Idx)
+ function Get_Output_Port_First_Attribute (M : Module; Port : Port_Idx)
return Attribute
is
Idx : constant Port_Desc_Idx :=
Get_Output_First_Desc (M) + Port_Desc_Idx (Port);
begin
return Get_Port_First_Attribute (Idx);
- end Get_First_Output_Port_Attribute;
+ end Get_Output_Port_First_Attribute;
-- Statistics
diff --git a/src/synth/netlists.ads b/src/synth/netlists.ads
index 55afc39be..3a2f45d54 100644
--- a/src/synth/netlists.ads
+++ b/src/synth/netlists.ads
@@ -329,7 +329,7 @@ package Netlists is
procedure Write_Pval (P : Pval; Off : Uns32; Val : Logic_32);
-- Add an attribute to INST.
- procedure Set_Attribute
+ procedure Set_Instance_Attribute
(Inst : Instance; Id : Name_Id; Ptype : Param_Type; Pv : Pval);
procedure Set_Input_Port_Attribute (M : Module;
@@ -344,10 +344,10 @@ package Netlists is
Pv : Pval);
-- Return the first attribute for INST. Returns No_Attribute if none.
- function Get_First_Attribute (Inst : Instance) return Attribute;
- function Get_First_Input_Port_Attribute (M : Module; Port : Port_Idx)
+ function Get_Instance_First_Attribute (Inst : Instance) return Attribute;
+ function Get_Input_Port_First_Attribute (M : Module; Port : Port_Idx)
return Attribute;
- function Get_First_Output_Port_Attribute (M : Module; Port : Port_Idx)
+ function Get_Output_Port_First_Attribute (M : Module; Port : Port_Idx)
return Attribute;
-- Get name/type/value of an attribute.
@@ -359,7 +359,7 @@ package Netlists is
function Get_Attribute_Next (Attr : Attribute) return Attribute;
-- Return True iff INST has at least one attribute.
- function Has_Attribute (Inst : Instance) return Boolean;
+ function Has_Instance_Attribute (Inst : Instance) return Boolean;
-- Display some usage stats on the standard error.
procedure Disp_Stats;
@@ -415,7 +415,7 @@ private
-- Per instance map of attribute.
-- The index is the sub-instance, the value is the attribute chain.
- package Attribute_Maps is new Dyn_Maps
+ package Instances_Attribute_Maps is new Dyn_Maps
(Params_Type => Instance,
Object_Type => Instance,
Value_Type => Attribute,
@@ -424,7 +424,8 @@ private
Build_Value => Attribute_Build_Value,
Equal => "=");
- type Attribute_Map_Acc is access Attribute_Maps.Instance;
+ type Instances_Attribute_Map_Acc is
+ access Instances_Attribute_Maps.Instance;
type Module_Record is record
Parent : Module;
@@ -450,14 +451,15 @@ private
Last_Instance : Instance;
-- Map of instance (of this module) to its attributes.
- Attrs : Attribute_Map_Acc;
+ Attrs : Instances_Attribute_Map_Acc;
end record;
function Get_First_Port_Desc (M : Module) return Port_Desc_Idx;
function Get_First_Output (Inst : Instance) return Net;
function Get_Port_Desc (Idx : Port_Desc_Idx) return Port_Desc;
- function Get_Attributes (M : Module) return Attribute_Map_Acc;
+ function Get_Instance_Attributes (M : Module)
+ return Instances_Attribute_Map_Acc;
function Is_Valid (I : Instance) return Boolean;
diff --git a/src/synth/synth-vhdl_decls.adb b/src/synth/synth-vhdl_decls.adb
index 8b54c94bd..4265c1072 100644
--- a/src/synth/synth-vhdl_decls.adb
+++ b/src/synth/synth-vhdl_decls.adb
@@ -238,7 +238,7 @@ package body Synth.Vhdl_Decls is
Ptype := Type_To_Param_Type (Get_Type (Attr_Decl));
Pv := Memtyp_To_Pval (Get_Memtyp (Val));
- Set_Attribute (Inst, Id, Ptype, Pv);
+ Set_Instance_Attribute (Inst, Id, Ptype, Pv);
end Synth_Attribute_Object;
procedure Synth_Attribute_Specification