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author | Tristan Gingold <tgingold@free.fr> | 2016-01-27 04:30:16 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2016-01-27 18:49:24 +0100 |
commit | f5b237b7a254f55b9b4f9e4cc6b47898237f91b5 (patch) | |
tree | b5deadb06c7125d42656979dccac046f01e42af0 /src | |
parent | 7574b55c8f65dc477e8aec66979de47c854ecae4 (diff) | |
download | ghdl-f5b237b7a254f55b9b4f9e4cc6b47898237f91b5.tar.gz ghdl-f5b237b7a254f55b9b4f9e4cc6b47898237f91b5.tar.bz2 ghdl-f5b237b7a254f55b9b4f9e4cc6b47898237f91b5.zip |
simul: handle declarations in configuration.
Diffstat (limited to 'src')
-rw-r--r-- | src/vhdl/simulate/annotations.adb | 21 | ||||
-rw-r--r-- | src/vhdl/simulate/annotations.ads | 4 | ||||
-rw-r--r-- | src/vhdl/simulate/elaboration.adb | 102 |
3 files changed, 68 insertions, 59 deletions
diff --git a/src/vhdl/simulate/annotations.adb b/src/vhdl/simulate/annotations.adb index 333a8c8f3..a19950d25 100644 --- a/src/vhdl/simulate/annotations.adb +++ b/src/vhdl/simulate/annotations.adb @@ -100,10 +100,10 @@ package body Annotations is end Create_Object_Info; -- Add an annotation to SIGNAL. - procedure Add_Signal_Info (Block_Info: Sim_Info_Acc; Signal: Iir) is + procedure Create_Signal_Info (Block_Info: Sim_Info_Acc; Signal: Iir) is begin Create_Object_Info (Block_Info, Signal, Kind_Signal); - end Add_Signal_Info; + end Create_Signal_Info; procedure Add_Terminal_Info (Block_Info: Sim_Info_Acc; Terminal : Iir) is begin @@ -428,9 +428,8 @@ package body Annotations is El := Decl_Chain; while El /= Null_Iir loop case Get_Kind (El) is - when Iir_Kind_Interface_Signal_Declaration => - Annotate_Anonymous_Type_Definition (Block_Info, Get_Type (El)); - when Iir_Kind_Interface_Variable_Declaration + when Iir_Kind_Interface_Signal_Declaration + | Iir_Kind_Interface_Variable_Declaration | Iir_Kind_Interface_Constant_Declaration | Iir_Kind_Interface_File_Declaration => Annotate_Anonymous_Type_Definition (Block_Info, Get_Type (El)); @@ -454,7 +453,7 @@ package body Annotations is end if; case Get_Kind (Decl) is when Iir_Kind_Interface_Signal_Declaration => - Add_Signal_Info (Block_Info, Decl); + Create_Signal_Info (Block_Info, Decl); when Iir_Kind_Interface_Variable_Declaration | Iir_Kind_Interface_Constant_Declaration | Iir_Kind_Interface_File_Declaration => @@ -567,7 +566,7 @@ package body Annotations is | Iir_Kind_Transaction_Attribute | Iir_Kind_Signal_Declaration => Annotate_Anonymous_Type_Definition (Block_Info, Get_Type (Decl)); - Add_Signal_Info (Block_Info, Decl); + Create_Signal_Info (Block_Info, Decl); when Iir_Kind_Variable_Declaration | Iir_Kind_Iterator_Declaration => @@ -796,7 +795,7 @@ package body Annotations is Guard := Get_Guard_Decl (Block); if Guard /= Null_Iir then - Add_Signal_Info (Info, Guard); + Create_Signal_Info (Info, Guard); end if; Header := Get_Block_Header (Block); if Header /= Null_Iir then @@ -1077,7 +1076,9 @@ package body Annotations is Config_Info: Sim_Info_Acc; begin pragma Assert (Current_Scope.Kind = Scope_Kind_None); - Increment_Current_Scope; + + Nbr_Packages := Nbr_Packages + 1; + Current_Scope := (Scope_Kind_Package, Nbr_Packages); Config_Info := new Sim_Info_Type' (Kind => Kind_Block, @@ -1086,6 +1087,8 @@ package body Annotations is Nbr_Objects => 0, Nbr_Instances => 0); + Set_Info (Decl, Config_Info); + Annotate_Declaration_List (Config_Info, Get_Declaration_Chain (Decl)); Annotate_Block_Configuration (Get_Block_Configuration (Decl)); diff --git a/src/vhdl/simulate/annotations.ads b/src/vhdl/simulate/annotations.ads index 5d927b54e..7401c606c 100644 --- a/src/vhdl/simulate/annotations.ads +++ b/src/vhdl/simulate/annotations.ads @@ -88,10 +88,10 @@ package Annotations is -- Slot number in the parent (for blocks). Inst_Slot : Instance_Slot_Type; - -- scope level for this frame. + -- Scope level for this frame. Frame_Scope : Scope_Type; - -- Number of objects/signals. + -- Number of objects/signals. Nbr_Objects : Object_Slot_Type; -- Number of children (blocks, generate, instantiation). diff --git a/src/vhdl/simulate/elaboration.adb b/src/vhdl/simulate/elaboration.adb index 525d471ab..739bf02df 100644 --- a/src/vhdl/simulate/elaboration.adb +++ b/src/vhdl/simulate/elaboration.adb @@ -247,18 +247,27 @@ package body Elaboration is Prefix => Prefix)); end Elaborate_Delayed_Signal; - procedure Elaborate_Package (Decl: Iir) + -- Create a block instance to instantiate OBJ (block, component, + -- architecture, generate) in FATHER. STMT is the statement/declaration + -- at the origin of the instantiation (it is generally the same as OBJ, + -- except for component where STMT is the component instantation + -- statement). + function Create_Block_Instance + (Father : Block_Instance_Acc; + Obj : Iir; + Stmt : Iir) + return Block_Instance_Acc is - Package_Info : constant Sim_Info_Acc := Get_Info (Decl); - Instance : Block_Instance_Acc; + Obj_Info : constant Sim_Info_Acc := Get_Info (Obj); + Res : Block_Instance_Acc; begin - Instance := new Block_Instance_Type' - (Max_Objs => Package_Info.Nbr_Objects, - Block_Scope => Package_Info.Frame_Scope, - Up_Block => null, - Label => Decl, - Stmt => Null_Iir, - Parent => null, + Res := new Block_Instance_Type' + (Max_Objs => Obj_Info.Nbr_Objects, + Block_Scope => Obj_Info.Frame_Scope, + Up_Block => Father, + Label => Stmt, + Stmt => Obj, + Parent => Father, Children => null, Brother => null, Marker => Empty_Marker, @@ -268,6 +277,21 @@ package body Elaboration is Actuals_Ref => null, Result => null); + if Father /= null then + Res.Brother := Father.Children; + Father.Children := Res; + end if; + + return Res; + end Create_Block_Instance; + + procedure Elaborate_Package (Decl: Iir) + is + Package_Info : constant Sim_Info_Acc := Get_Info (Decl); + Instance : Block_Instance_Acc; + begin + Instance := Create_Block_Instance (null, Decl, Decl); + Package_Instances (Package_Info.Frame_Scope.Pkg_Index) := Instance; if Trace_Elaboration then @@ -293,6 +317,25 @@ package body Elaboration is Elaborate_Declarative_Part (Instance, Get_Declaration_Chain (Decl)); end Elaborate_Package_Body; + procedure Elaborate_Configuration_Declaration (Decl : Iir) + is + Config_Info : constant Sim_Info_Acc := Get_Info (Decl); + Instance : Block_Instance_Acc; + begin + if Config_Info = null then + -- Not a user defined configuration. No objects. + pragma Assert (Get_Identifier (Decl) = Null_Identifier); + return; + end if; + + Instance := Create_Block_Instance (null, Decl, Decl); + + Package_Instances (Config_Info.Frame_Scope.Pkg_Index) := Instance; + + -- Elaborate objects declarations. + Elaborate_Declarative_Part (Instance, Get_Declaration_Chain (Decl)); + end Elaborate_Configuration_Declaration; + -- Elaborate all packages which DESIGN_UNIT depends on. -- The packages are elaborated only once. The body, if the package needs -- one, can be loaded during the elaboration. @@ -374,44 +417,6 @@ package body Elaboration is end loop; end Elaborate_Dependence; - -- Create a block instance to instantiate OBJ (block, component, - -- architecture, generate) in FATHER. STMT is the statement/declaration - -- at the origin of the instantiation (it is generally the same as OBJ, - -- except for component where STMT is the component instantation - -- statement). - function Create_Block_Instance - (Father : Block_Instance_Acc; - Obj : Iir; - Stmt : Iir) - return Block_Instance_Acc - is - Obj_Info : constant Sim_Info_Acc := Get_Info (Obj); - Res : Block_Instance_Acc; - begin - Res := new Block_Instance_Type' - (Max_Objs => Obj_Info.Nbr_Objects, - Block_Scope => Obj_Info.Frame_Scope, - Up_Block => Father, - Label => Stmt, - Stmt => Obj, - Parent => Father, - Children => null, - Brother => null, - Marker => Empty_Marker, - Objects => (others => null), - Elab_Objects => 0, - In_Wait_Flag => False, - Actuals_Ref => null, - Result => null); - - if Father /= null then - Res.Brother := Father.Children; - Father.Children := Res; - end if; - - return Res; - end Create_Block_Instance; - function Create_Protected_Object (Block: Block_Instance_Acc; Decl: Iir) return Iir_Value_Literal_Acc is @@ -2605,6 +2610,7 @@ package body Elaboration is Arch := Get_Named_Entity (Get_Block_Specification (Get_Block_Configuration (Unit))); Elaborate_Dependence (Design); + Elaborate_Configuration_Declaration (Unit); when others => Error_Kind ("elaborate_design", Unit); end case; |