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authorTristan Gingold <tgingold@free.fr>2019-11-06 04:18:25 +0100
committerTristan Gingold <tgingold@free.fr>2019-11-06 04:19:10 +0100
commitc6edf7060590f9207bd82a649f2712d5ac50e427 (patch)
treebbbac221c02cff8f15b2a14bb5950ddf61fdf027 /testsuite/synth/issue1009/record_test.vhdl
parentf7887b6234530f435142c99e0eeb7b67bfe85020 (diff)
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Add testcase for #1009
Diffstat (limited to 'testsuite/synth/issue1009/record_test.vhdl')
-rw-r--r--testsuite/synth/issue1009/record_test.vhdl15
1 files changed, 15 insertions, 0 deletions
diff --git a/testsuite/synth/issue1009/record_test.vhdl b/testsuite/synth/issue1009/record_test.vhdl
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+entity record_test is
+ port (
+ o : out integer
+ );
+end record_test;
+
+architecture rtl of record_test is
+ type t_record is record
+ int : integer;
+ end record t_record;
+ constant rec_constant : t_record := (int => 27.777 us / 83.333 ns);
+ constant rec_constant2 : t_record := rec_constant;
+begin
+ o <= rec_constant2.int;
+end rtl;