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author | Tristan Gingold <tgingold@free.fr> | 2019-11-28 06:26:42 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-11-28 06:26:42 +0100 |
commit | 95801a5144f62bb45c60d6d04a0ec479bb97a693 (patch) | |
tree | 5650350c5ea848e0b302c19f1c9112e5ce724a7b /testsuite/synth/issue1036/ent.vhdl | |
parent | 45fd84fcfce9e949223f9e8c537ebb7bb6f2699c (diff) | |
download | ghdl-95801a5144f62bb45c60d6d04a0ec479bb97a693.tar.gz ghdl-95801a5144f62bb45c60d6d04a0ec479bb97a693.tar.bz2 ghdl-95801a5144f62bb45c60d6d04a0ec479bb97a693.zip |
testsuite: add case for #1036
Diffstat (limited to 'testsuite/synth/issue1036/ent.vhdl')
-rw-r--r-- | testsuite/synth/issue1036/ent.vhdl | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/testsuite/synth/issue1036/ent.vhdl b/testsuite/synth/issue1036/ent.vhdl new file mode 100644 index 000000000..534c32b56 --- /dev/null +++ b/testsuite/synth/issue1036/ent.vhdl @@ -0,0 +1,16 @@ +entity ent is +end ent; + +architecture a of ent is + signal s : string(1 to 3); +begin + s <= "abc"; + + process(all) + begin + case s is + when "abc" => + when others => + end case; + end process; +end a; |