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authorTristan Gingold <tgingold@free.fr>2020-04-17 07:25:26 +0200
committerTristan Gingold <tgingold@free.fr>2020-04-17 07:25:26 +0200
commit45158bdc5443993ecb28b135ffe1a1b77032277d (patch)
tree266c0531a17115da320ca9fa8509f7194bd5fc40 /testsuite/synth/issue1234
parent465b041e9f81de03f3679b34184c175450f5f5ca (diff)
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testcase/synth: add case for #1234
Diffstat (limited to 'testsuite/synth/issue1234')
-rw-r--r--testsuite/synth/issue1234/issue.vhdl11
-rwxr-xr-xtestsuite/synth/issue1234/testsuite.sh7
2 files changed, 18 insertions, 0 deletions
diff --git a/testsuite/synth/issue1234/issue.vhdl b/testsuite/synth/issue1234/issue.vhdl
new file mode 100644
index 000000000..785dea07c
--- /dev/null
+++ b/testsuite/synth/issue1234/issue.vhdl
@@ -0,0 +1,11 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity issue is
+ port (foobar : out std_logic_vector (3 downto 0));
+end issue;
+
+architecture beh of issue is
+begin
+ foobar <= ((foobar'range=>'0'));
+end architecture;
diff --git a/testsuite/synth/issue1234/testsuite.sh b/testsuite/synth/issue1234/testsuite.sh
new file mode 100755
index 000000000..7ea797e43
--- /dev/null
+++ b/testsuite/synth/issue1234/testsuite.sh
@@ -0,0 +1,7 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+synth issue.vhdl -e > syn_issue.vhdl
+
+echo "Test successful"