testsuite/synth: add a test for #2085

1 files changed, 27 insertions, 0 deletions

diff --git a/testsuite/synth/issue2085/bug.vhdl b/testsuite/synth/issue2085/bug.vhdl
new file mode 100644
index 000000000..0b719a075
--- /dev/null
+++ b/testsuite/synth/issue2085/bug.vhdl
@@ -0,0 +1,27 @@
+library IEEE;
+use IEEE.std_logic_1164.all;
+
+entity bug is
+	port (
+		clk   : in  std_ulogic;
+		src   : in  std_ulogic_vector(15 downto 0);
+		dst   : out std_ulogic_vector(16 downto 0)
+	);
+end bug;
+
+architecture rtl of bug is
+begin
+
+process(clk)
+	function fun(val : std_ulogic_vector) return std_ulogic_vector is
+		variable tmp : val'subtype; --this causes the crash
+	begin
+		return val;
+	end function;
+begin
+	if rising_edge(clk) then
+		dst <= '0' & fun(src);
+	end if;
+end process;
+
+end architecture;