testsuite/synth: rename issueXX to synthXX for ghdlsynth-beta issues.

1 files changed, 0 insertions, 20 deletions

diff --git a/testsuite/synth/issue26/int_test.vhdl b/testsuite/synth/issue26/int_test.vhdl
deleted file mode 100644
index afc8c4cdb..000000000
--- a/testsuite/synth/issue26/int_test.vhdl
+++ /dev/null
@@ -1,20 +0,0 @@
-library ieee;
-use ieee.std_logic_1164.all;
-
-entity int_test is
-  port (clk : in std_logic;
-        a, b : in integer range 0 to 1;
-        c : out std_logic);
-end int_test;
-
-architecture rtl of int_test is
-begin
-  process (clk)
-  begin
-    if rising_edge (clk) then
-      if a < b then
-        c <= '0';
-      end if;
-    end if;
-  end process;
-end rtl;