testsuite/synth: merge ram01 to mem01, add NOTES.txt

1 files changed, 38 insertions, 0 deletions

diff --git a/testsuite/synth/mem01/tb_srom01.vhdl b/testsuite/synth/mem01/tb_srom01.vhdl
new file mode 100644
index 000000000..530423a67
--- /dev/null
+++ b/testsuite/synth/mem01/tb_srom01.vhdl
@@ -0,0 +1,38 @@
+entity tb_srom01 is
+end tb_srom01;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture behav of tb_srom01 is
+  signal addr : std_logic_vector(3 downto 0);
+  signal rdat : std_logic_vector(7 downto 0);
+  signal clk : std_logic;
+begin
+  dut: entity work.srom01
+    port map (clk_i => clk, addr_i => addr, data_o => rdat);
+
+  process
+    procedure pulse is
+    begin
+      clk <= '0';
+      wait for 1 ns;
+      clk <= '1';
+      wait for 1 ns;
+    end pulse;
+  begin
+    addr <= "0000";
+    pulse;
+    assert rdat = x"f0" severity failure;
+
+    addr <= "0001";
+    pulse;
+    assert rdat = x"e1" severity failure;
+
+    addr <= "0100";
+    pulse;
+    assert rdat = x"b4" severity failure;
+
+    wait;
+  end process;
+end behav;