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authorTristan Gingold <tgingold@free.fr>2019-09-08 08:36:02 +0200
committerTristan Gingold <tgingold@free.fr>2019-09-11 06:37:27 +0200
commit419d542accc0a0bd5f3daa833f202043ce6f480c (patch)
tree4a374481236e336367f72cdc5499081d8f46e785 /testsuite/synth/mem02/dpram1.vhdl
parent1e1eab735ecad00ee663a68e3a5118e041c20739 (diff)
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testsuite/synth: rename arr02 to mem01
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