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| author | Tristan Gingold <tgingold@free.fr> | 2020-01-12 21:28:17 +0100 |
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| committer | Tristan Gingold <tgingold@free.fr> | 2020-01-12 21:28:17 +0100 |
| commit | 3439e17389eeedf793cf930b642c539b73766a10 (patch) | |
| tree | e0e8b19e09024dca1ef858c9d062a5872ca21013 /testsuite/synth/slice01/slice01.vhdl | |
| parent | 10f07155f071a53ebd6e45a70c449a8a262f9701 (diff) | |
| download | ghdl-3439e17389eeedf793cf930b642c539b73766a10.tar.gz ghdl-3439e17389eeedf793cf930b642c539b73766a10.tar.bz2 ghdl-3439e17389eeedf793cf930b642c539b73766a10.zip | |
synth-decls: do subtype conversion for signal default value.
Diffstat (limited to 'testsuite/synth/slice01/slice01.vhdl')
0 files changed, 0 insertions, 0 deletions