testsuite/synth: add forloop2 test.

1 files changed, 32 insertions, 0 deletions

diff --git a/testsuite/synth/stmt01/tb_forloop2.vhdl b/testsuite/synth/stmt01/tb_forloop2.vhdl
new file mode 100644
index 000000000..9ae956da6
--- /dev/null
+++ b/testsuite/synth/stmt01/tb_forloop2.vhdl
@@ -0,0 +1,32 @@
+entity tb_forloop2 is
+end tb_forloop2;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture behav of tb_forloop2 is
+  signal vin : std_logic_vector (7 downto 0);
+  signal vout : std_logic_vector (3 downto 0);
+  signal clk : std_logic;
+  signal b : std_logic;
+  signal c : std_logic;
+  signal z : std_logic;
+begin
+  dut: entity work.forloop2
+    port map (vin => vin, vout => vout, clk => clk);
+
+  process
+    procedure pulse is
+    begin
+      clk <= '0';
+      wait for 1 ns;
+      clk <= '1';
+      wait for 1 ns;
+    end pulse;
+  begin
+    vin <= x"00";
+    pulse;
+    assert vout = x"0" severity failure;
+    wait;
+  end process;
+end behav;