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authorTristan Gingold <tgingold@free.fr>2019-09-25 20:39:46 +0200
committerTristan Gingold <tgingold@free.fr>2019-09-25 20:39:46 +0200
commit6e9336d11dfc4f53dba234e1f02a2b0172461e0c (patch)
tree12f93ed2cbbb62c0e8e2fb6b7124201fe0a216bd /testsuite/synth/synth8/test5.vhdl
parentdcc353b07b82a84f2aa598de3884c58f406e0652 (diff)
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testsuite/synth: rename issueXX to synthXX for ghdlsynth-beta issues.
Diffstat (limited to 'testsuite/synth/synth8/test5.vhdl')
-rw-r--r--testsuite/synth/synth8/test5.vhdl15
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diff --git a/testsuite/synth/synth8/test5.vhdl b/testsuite/synth/synth8/test5.vhdl
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+++ b/testsuite/synth/synth8/test5.vhdl
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+library ieee;
+use ieee.std_logic_1164.all;
+
+entity test5 is
+ port (led: out std_logic_vector (7 downto 0));
+end test5;
+
+architecture synth of test5 is
+
+begin
+ led(7) <= '1';
+-- led(6) <= '1';
+-- led(5) <= '0';
+-- led(3 downto 0) <= x"9";
+end synth;