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authorTristan Gingold <tgingold@free.fr>2013-12-20 04:48:54 +0100
committerTristan Gingold <tgingold@free.fr>2013-12-20 04:48:54 +0100
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treebd12c79c71a2ee65899a9ade9919ec2045addef8 /testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt
parentbd4aff0f670351c0652cf24e9b04361dc0e3a01c (diff)
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Import vests testsuite
Diffstat (limited to 'testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt')
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/bouncing_ball.ams55
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/lorenz_chaos.ams56
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/precharged_capacitor.ams67
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test123.ams82
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test133.ams78
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test134.ams98
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test158.ams98
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test180.ams74
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test181.ams73
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/torsional_oscillator.ams52
10 files changed, 733 insertions, 0 deletions
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/bouncing_ball.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/bouncing_ball.ams
new file mode 100644
index 000000000..b646742fc
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/bouncing_ball.ams
@@ -0,0 +1,55 @@
+
+-- Copyright (C) 2000-2002 The University of Cincinnati.
+-- All rights reserved.
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
+-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
+-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
+-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY
+-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR
+-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
+-- June 1991. A copy of this license agreement can be found in the file
+-- "COPYING", distributed with this archive.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: bouncing_ball.ams,v 1.1 2002-03-27 22:11:17 paw Exp $
+-- $Revision: 1.1 $
+--
+-- ---------------------------------------------------------------------
+
+ENTITY bouncing_ball IS
+END ENTITY bouncing_ball;
+
+ARCHITECTURE simple OF bouncing_ball IS
+
+ QUANTITY v: real;
+ QUANTITY s: real;
+ CONSTANT G: real := 9.81;
+
+ CONSTANT Air_Res: real := 0.1;
+
+BEGIN
+
+ b1:BREAK v => 0.0, s => 30.0; -- announce discontinuity and reset
+
+ b2:BREAK v => -0.7*v WHEN NOT(s'above(0.0));
+
+ velocity: v == s'dot ;
+
+ acceleration: v'dot == -G;
+
+END ARCHITECTURE simple;
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/lorenz_chaos.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/lorenz_chaos.ams
new file mode 100644
index 000000000..97b3bcc57
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/lorenz_chaos.ams
@@ -0,0 +1,56 @@
+
+-- Copyright (C) 2000-2002 The University of Cincinnati.
+-- All rights reserved.
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
+-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
+-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
+-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY
+-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR
+-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
+-- June 1991. A copy of this license agreement can be found in the file
+-- "COPYING", distributed with this archive.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: lorenz_chaos.ams,v 1.1 2002-03-27 22:11:17 paw Exp $
+-- $Revision: 1.1 $
+--
+-- ---------------------------------------------------------------------
+
+entity LorenzChaos is
+end entity LorenzChaos;
+
+architecture Chaotic of LorenzChaos is
+
+ constant s: real := 10.0; -- define equation parameters s,b,r
+ constant b: real := 8.0/3.0;
+ constant r: real := 28.0;
+ quantity x: real;
+ quantity y: real;
+ quantity z: real;
+
+begin
+ -- set an initial condition to guarantee chaotic behaviour:
+ br:break x=> y , y => 5.0, z => 25.0;
+ br1:break when y'above(25.0);
+
+ -- equation set:
+ eq1:x == y-(x'dot/s);
+ eq2:y == r*x-x*z-y'dot;
+ eq3:z == (x*y -z'dot)/b;
+
+end architecture Chaotic;
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/precharged_capacitor.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/precharged_capacitor.ams
new file mode 100644
index 000000000..d62c63a3e
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/precharged_capacitor.ams
@@ -0,0 +1,67 @@
+
+-- Copyright (C) 2000-2002 The University of Cincinnati.
+-- All rights reserved.
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
+-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
+-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
+-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY
+-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR
+-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
+-- June 1991. A copy of this license agreement can be found in the file
+-- "COPYING", distributed with this archive.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: precharged_capacitor.ams,v 1.1 2002-03-27 22:11:17 paw Exp $
+-- $Revision: 1.1 $
+--
+-- ---------------------------------------------------------------------
+
+-- This is a model of discharging of a precharged capacitor
+-- Break statement has been used here to set the initial
+-- value of the voltage to which the capacotor was charged
+-- authors: Shishir Agrawal
+-- Vikram
+-- Sanjiv Pandey
+
+PACKAGE electricalSystem IS
+ NATURE electrical IS real ACROSS real THROUGH Ground REFERENCE;
+ FUNCTION SIN(X : real) RETURN real;
+ FUNCTION EXP(X : real) RETURN real;
+ FUNCTION SQRT(X : real) RETURN real;
+ FUNCTION POW(X,Y : real) RETURN real;
+END PACKAGE electricalSystem;
+
+use work.electricalsystem.all;
+
+ENTITY RC IS
+END;
+
+ARCHITECTURE behav OF RC IS
+ TERMINAL n1,n2: ELECTRICAL;
+ QUANTITY v_in ACROSS i_in THROUGH n1;
+ QUANTITY u_r ACROSS i_r THROUGH n1 TO n2;
+ QUANTITY u_c ACROSS i_c THROUGH n2;
+BEGIN
+
+
+ b1: BREAK u_c => 0.5; --initvalue
+
+ e1: v_in == 0.0; --constant voltage source
+ e2: i_r == u_r / 1000.0; --resistor equation
+ e3: i_c == 1.0e-6 * u_c'dot; --capacitor equation
+END;
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test123.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test123.ams
new file mode 100644
index 000000000..9d3e53e7b
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test123.ams
@@ -0,0 +1,82 @@
+
+-- Copyright (C) 2001-2002 The University of Cincinnati.
+-- All rights reserved.
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
+-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
+-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
+-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY
+-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR
+-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
+-- June 1991. A copy of this license agreement can be found in the file
+-- "COPYING", distributed with this archive.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: test123.ams,v 1.1 2002-03-27 22:11:17 paw Exp $
+-- $Revision: 1.1 $
+--
+-- ---------------------------------------------------------------------
+
+----------------------------------------------------------------------
+-- SIERRA REGRESSION TESTING MODEL
+-- Develooped at:
+-- Distriburted Processing Laboratory
+-- University of Cincinnati
+-- Cincinnati
+----------------------------------------------------------------------
+-- File : test113.ams
+-- Author(s) : Geeta Balarkishnan(gbalakri@ececs.uc.edu)
+-- Created : May 2001
+----------------------------------------------------------------------
+-- Description :
+----------------------------------------------------------------------
+-- to check the correct implementation of the simultaneous if statement
+-- break and 'above is also used. it checks for the eqns v'=g*v**2 for
+-- +g and -g.
+----------------------------------------------------------------------
+PACKAGE electricalSystem IS
+ NATURE electrical IS real ACROSS real THROUGH;
+ FUNCTION SIN(X : real) RETURN real;
+-- alias ground is electrical'reference;
+END PACKAGE electricalSystem;
+
+use work.electricalsystem.all;
+
+entity test is
+end entity test;
+
+architecture atest of test is
+quantity v : real;
+quantity s: real;
+constant g : real :=9.81;
+constant r : real:=1.02;
+
+begin
+
+break v=>0.0, s=>100.0;
+
+break v=>-v when not s'above(0.0);
+
+s'dot==v;
+
+if v>0.0 use
+ v'dot == -g+v*v*r;
+else
+ v'dot == -g-v*v*r;
+end use;
+
+end architecture atest;
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test133.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test133.ams
new file mode 100644
index 000000000..e97d77b03
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test133.ams
@@ -0,0 +1,78 @@
+
+-- Copyright (C) 2001-2002 The University of Cincinnati.
+-- All rights reserved.
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
+-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
+-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
+-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY
+-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR
+-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
+-- June 1991. A copy of this license agreement can be found in the file
+-- "COPYING", distributed with this archive.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: test133.ams,v 1.1 2002-03-27 22:11:17 paw Exp $
+-- $Revision: 1.1 $
+--
+-- ---------------------------------------------------------------------
+
+----------------------------------------------------------------------
+-- SIERRA REGRESSION TESTING MODEL
+-- Develooped at:
+-- Distriburted Processing Laboratory
+-- University of Cincinnati
+-- Cincinnati
+----------------------------------------------------------------------
+-- File : test133.ams
+-- Author(s) : Geeta Balarkishnan(gbalakri@ececs.uc.edu)
+-- Created : May 2001
+----------------------------------------------------------------------
+-- Description :
+----------------------------------------------------------------------
+
+--this test checks the correctness of the break statement for a
+-- quantity port declaration.
+-- LRM ref: 8.14
+----------------------------------------------------------------------
+
+PACKAGE electricalSystem IS
+ NATURE electrical IS real ACROSS real THROUGH ground reference;
+ FUNCTION SIN(X : real) RETURN real;
+ FUNCTION EXP(X : real) RETURN real;
+ FUNCTION SQRT(X : real) RETURN real;
+ FUNCTION POW(X,Y : real) RETURN real;
+ subtype voltage is real;
+
+END PACKAGE electricalSystem;
+
+use work.electricalSystem.all;
+
+entity test is
+ generic (m: real := 1.0);
+ port (quantity x: out voltage);
+end entity test;
+
+architecture atest of test is
+--quantity x: real;
+quantity q: real;
+begin
+ break x => 0.0, x'dot => 0.1;
+ e1: q== x'dot;
+ x'dot'dot == -1.0*( m*(x*x - 1.0)* x'dot);
+
+end architecture atest;
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test134.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test134.ams
new file mode 100644
index 000000000..0f80d28c0
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test134.ams
@@ -0,0 +1,98 @@
+
+-- Copyright (C) 2001-2002 The University of Cincinnati.
+-- All rights reserved.
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
+-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
+-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
+-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY
+-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR
+-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
+-- June 1991. A copy of this license agreement can be found in the file
+-- "COPYING", distributed with this archive.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: test134.ams,v 1.1 2002-03-27 22:11:17 paw Exp $
+-- $Revision: 1.1 $
+--
+-- ---------------------------------------------------------------------
+
+----------------------------------------------------------------------
+-- SIERRA REGRESSION TESTING MODEL
+-- Develooped at:
+-- Distriburted Processing Laboratory
+-- University of Cincinnati
+-- Cincinnati
+----------------------------------------------------------------------
+-- File : test151.ams
+-- Author(s) : Geeta Balarkishnan(gbalakri@ececs.uc.edu)
+-- Created : May 2001
+----------------------------------------------------------------------
+-- Description :
+----------------------------------------------------------------------
+-- this is a test to check the corretness of the implemntation of the break
+-- statement and also the use of quantity port of type voltage.
+-- this is a vco model which first sets the initial condition
+-- using a break statement. Then again, a break statement is applied to keep
+-- the phase within 0-2pi. Thr output voltage eqn is obtained as vout and the
+-- phase eqn as phase'dot.
+-- LRM ref: 8.14, 4.3.2.
+---------------------------------------------------------------------------------
+PACKAGE electricalSystem IS
+ SUBTYPE voltage is real;
+ NATURE electrical IS real ACROSS real THROUGH;
+ FUNCTION SIN(X : real) RETURN real;
+ FUNCTION EXP(X : real) RETURN real;
+ FUNCTION SQRT(X : real) RETURN real;
+ FUNCTION POW(X,Y : real) RETURN real;
+END PACKAGE electricalSystem;
+
+use work.electricalSystem.all;
+
+entity vco is
+ generic(
+ fc: real := 1.0e6; -- VCO frequency at Vc
+ df: real := 0.5e6; -- [Hz/V], frequency characteristic slope
+ Vc: voltage := 0.0 -- centre frequency input voltage
+ );
+ port( quantity Vin: in voltage;
+ terminal OutTerminal: electrical);
+end entity VCO;
+
+architecture avco of vco is
+ constant TwoPi: real := 6.283118530718; -- 2pi
+
+ quantity Phase : real;
+
+ -- define a branch for the output voltage source
+
+ quantity Vout across Iout through OutTerminal to electrical'reference;
+
+begin
+ -- use break to set the phase initial condition
+ break Phase => 0.0;
+
+ -- another break statement keeps the phase within 0.. 2pi
+ break Phase => Phase mod TwoPi on Phase'above(TwoPi);
+
+ -- phase equation
+ Phase'dot == TwoPi*realmax(0.5E6, fc+(Vin-Vc)*df);
+
+ -- output voltage source equation
+ Vout == 2.5*(1.0+sin(Phase));
+
+end architecture avco;
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test158.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test158.ams
new file mode 100644
index 000000000..f96b6f476
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test158.ams
@@ -0,0 +1,98 @@
+
+-- Copyright (C) 2001-2002 The University of Cincinnati.
+-- All rights reserved.
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
+-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
+-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
+-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY
+-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR
+-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
+-- June 1991. A copy of this license agreement can be found in the file
+-- "COPYING", distributed with this archive.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: test158.ams,v 1.1 2002-03-27 22:11:17 paw Exp $
+-- $Revision: 1.1 $
+--
+-- ---------------------------------------------------------------------
+
+----------------------------------------------------------------------
+-- SIERRA REGRESSION TESTING MODEL
+-- Develooped at:
+-- Distriburted Processing Laboratory
+-- University of Cincinnati
+-- Cincinnati
+----------------------------------------------------------------------
+-- File : test134.ams
+-- Author(s) : Geeta Balarkishnan(gbalakri@ececs.uc.edu)
+-- Created : June 2001
+----------------------------------------------------------------------
+-- Description :
+----------------------------------------------------------------------
+-- this is a test to check the corretness of the implemntation of the break
+-- statement and also the use of quantity port of type voltage.
+-- this is a vco model which first sets the initial condition
+-- using a break statement. Then again, a break statement is applied to keep
+-- the phase within 0-2pi. Thr output voltage eqn is obtained as vout and the
+-- phase eqn as phase'dot.
+-- LRM ref: 8.14, 4.3.2.
+----------------------------------------------------------------------
+PACKAGE electricalSystem IS
+ -- SUBTYPE voltage is real;
+ NATURE electrical IS real ACROSS real THROUGH ground reference;
+ FUNCTION SIN(X : real) RETURN real;
+ FUNCTION EXP(X : real) RETURN real;
+ FUNCTION SQRT(X : real) RETURN real;
+ FUNCTION POW(X,Y : real) RETURN real;
+END PACKAGE electricalSystem;
+
+use work.electricalSystem.all;
+
+entity vco is
+ generic(
+ fc: real := 1.0e6; -- VCO frequency at Vc
+ df: real := 0.5e6; -- [Hz/V], frequency characteristic slope
+ Vc: voltage := 0.0 -- centre frequency input voltage
+ );
+ port( quantity Vin: in real;
+ terminal OutTerminal: electrical);
+end entity VCO;
+
+architecture avco of vco is
+ constant TwoPi: real := 6.283118530718; -- 2pi
+
+ quantity Phase : real;
+
+ -- define a branch for the output voltage source
+
+ quantity Vout across Iout through OutTerminal to electrical'reference;
+
+begin
+ -- use break to set the phase initial condition
+ break Phase => 0.0;
+
+ -- another break statement keeps the phase within 0.. 2pi
+ break Phase => Phase mod TwoPi on Phase'above(TwoPi);
+
+ -- phase equation
+ Phase'dot == TwoPi*realmax(0.5E6, fc+(Vin-Vc)*df);
+
+ -- output voltage source equation
+ Vout == 2.5*(1.0+sin(Phase));
+
+end architecture avco;
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test180.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test180.ams
new file mode 100644
index 000000000..3e33069e4
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test180.ams
@@ -0,0 +1,74 @@
+
+-- Copyright (C) 2001-2002 The University of Cincinnati.
+-- All rights reserved.
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
+-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
+-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
+-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY
+-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR
+-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
+-- June 1991. A copy of this license agreement can be found in the file
+-- "COPYING", distributed with this archive.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: test180.ams,v 1.1 2002-03-27 22:11:17 paw Exp $
+-- $Revision: 1.1 $
+--
+-- ---------------------------------------------------------------------
+
+----------------------------------------------------------------------
+-- SIERRA REGRESSION TESTING MODEL
+-- Develooped at:
+-- Distriburted Processing Laboratory
+-- University of Cincinnati
+-- Cincinnati
+----------------------------------------------------------------------
+-- File : test180.ams
+-- Author(s) : Geeta Balarkishnan(gbalakri@ececs.uc.edu)
+-- Created : Sept 2001
+----------------------------------------------------------------------
+-- Description :
+----------------------------------------------------------------------
+-- the test is done for checking the correct implementation
+-- of the break statement.it checks simple break and break on
+-- codition.
+
+PACKAGE electricalSystem IS
+ NATURE electrical IS real ACROSS real THROUGH; -- GROUND REFERENCE;
+ FUNCTION SIN(X : real) RETURN real;
+ FUNCTION EXP(X : real) RETURN real;
+END PACKAGE electricalSystem;
+
+use work.electricalSystem.all;
+entity VCO is
+ port(terminal InTerminal,OutTerminal: electrical);
+end VCO;
+
+architecture PhaseIntegrator of VCO is
+
+ quantity Vin across Iin through InTerminal to OutTerminal;
+ constant TwoPi: real := 6.283118530718; -- 2pi
+ quantity Phase : real; -- phase is a free quantity:
+ quantity Vout across Iout through OutTerminal;
+
+begin
+
+ break Phase => TwoPi;
+ Vout == 2.5*(sin(Phase)); -- output statement
+
+end PhaseIntegrator;
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test181.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test181.ams
new file mode 100644
index 000000000..4c7caf467
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/test181.ams
@@ -0,0 +1,73 @@
+
+-- Copyright (C) 2001-2002 The University of Cincinnati.
+-- All rights reserved.
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
+-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
+-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
+-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY
+-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR
+-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
+-- June 1991. A copy of this license agreement can be found in the file
+-- "COPYING", distributed with this archive.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: test181.ams,v 1.1 2002-03-27 22:11:17 paw Exp $
+-- $Revision: 1.1 $
+--
+-- ---------------------------------------------------------------------
+
+----------------------------------------------------------------------
+-- SIERRA REGRESSION TESTING MODEL
+-- Develooped at:
+-- Distriburted Processing Laboratory
+-- University of Cincinnati
+-- Cincinnati
+----------------------------------------------------------------------
+-- File : test181.ams
+-- Author(s) : Geeta Balarkishnan(gbalakri@ececs.uc.edu)
+-- Created : Sept 2001
+----------------------------------------------------------------------
+-- Description :
+----------------------------------------------------------------------
+-- the test is done for checking the correct implementation
+-- of the break statement.it checks simple break and break on
+-- codition.
+
+PACKAGE electricalSystem IS
+ NATURE electrical IS real ACROSS real THROUGH; -- GROUND REFERENCE;
+ FUNCTION SIN(X : real) RETURN real;
+ FUNCTION EXP(X : real) RETURN real;
+END PACKAGE electricalSystem;
+use work.electricalSystem.all;
+
+entity VCO is
+ port(terminal InTerminal,OutTerminal: electrical);
+end VCO;
+
+architecture PhaseIntegrator of VCO is
+ quantity Vin across Iin through InTerminal to OutTerminal;
+ constant TwoPi: real := 6.283118530718; -- 2pi
+ quantity Phase : real; -- phase is a free quantity:
+ quantity Vout across Iout through OutTerminal;
+begin
+ break Phase => TwoPi;
+ -- break allows to define the initial conditions
+ break Phase => 0.0 on Phase'above(TwoPi);
+ Vout == 2.5*(sin(Phase)); -- output statement
+end PhaseIntegrator;
+
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/torsional_oscillator.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/torsional_oscillator.ams
new file mode 100644
index 000000000..084f90c99
--- /dev/null
+++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/torsional_oscillator.ams
@@ -0,0 +1,52 @@
+
+-- Copyright (C) 2000-2002 The University of Cincinnati.
+-- All rights reserved.
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE
+-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
+-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
+-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY
+-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR
+-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2,
+-- June 1991. A copy of this license agreement can be found in the file
+-- "COPYING", distributed with this archive.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: torsional_oscillator.ams,v 1.1 2002-03-27 22:11:17 paw Exp $
+-- $Revision: 1.1 $
+--
+-- ---------------------------------------------------------------------
+
+--Torsional oscillator
+ENTITY bouncer IS
+END ENTITY bouncer;
+
+ARCHITECTURE simple OF bouncer IS
+ CONSTANT m1 : REAL := 0.0;
+ CONSTANT md : REAL := 0.0;
+ CONSTANT mc : REAL := 1.0;
+ QUANTITY om : REAL;
+ QUANTITY ph : REAL;
+
+BEGIN
+ --Initvalues
+ BREAK om => 0.0, ph => 0.0;
+
+ (om'dot) == 10000.0*(1.0 - 1000.0 * ph);
+ (ph'dot) == om;
+
+END ARCHITECTURE simple;