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authorTristan Gingold <tgingold@free.fr>2019-12-30 16:22:57 +0100
committerTristan Gingold <tgingold@free.fr>2019-12-30 16:22:57 +0100
commite9dfd170410bc6fc534f845976e08082fe217fc5 (patch)
tree1bbc99f5f865c4e8b9f8cb8fd6ff2b27bc80413d /testsuite/vests
parent2bb69da764f47506620809602ed08ce1bf5facc4 (diff)
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testsuite/vests/vhdl-ams: adjust tests lists.
Diffstat (limited to 'testsuite/vests')
-rw-r--r--testsuite/vests/vhdl-ams/ad-hoc/files-ams.txt38
-rw-r--r--testsuite/vests/vhdl-ams/ashenden/files-ams.txt32
2 files changed, 35 insertions, 35 deletions
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/files-ams.txt b/testsuite/vests/vhdl-ams/ad-hoc/files-ams.txt
index 64c42478e..2c71c4370 100644
--- a/testsuite/vests/vhdl-ams/ad-hoc/files-ams.txt
+++ b/testsuite/vests/vhdl-ams/ad-hoc/files-ams.txt
@@ -4,51 +4,51 @@ vhdl-ams/ad-hoc/fromUC/analog_models/bjt_pnp_gen.ams
#vhdl-ams/ad-hoc/fromUC/analog_models/static_cmos_inv_sqr.ams # syntax
vhdl-ams/ad-hoc/fromUC/analog_models/static_njfet.ams
vhdl-ams/ad-hoc/fromUC/analog_models/static_pjfet.ams
-#vhdl-ams/ad-hoc/fromUC/array_models/cap_array.ams # array
-#vhdl-ams/ad-hoc/fromUC/array_models/res_array.ams # array
-#vhdl-ams/ad-hoc/fromUC/array_models/res_index.ams # array
-#vhdl-ams/ad-hoc/fromUC/array_tests/test107.ams # 'ref
-#vhdl-ams/ad-hoc/fromUC/array_tests/test129.ams # syntax
-#vhdl-ams/ad-hoc/fromUC/array_tests/test130.ams # syntax
+vhdl-ams/ad-hoc/fromUC/array_models/cap_array.ams
+vhdl-ams/ad-hoc/fromUC/array_models/res_array.ams
+vhdl-ams/ad-hoc/fromUC/array_models/res_index.ams
+#vhdl-ams/ad-hoc/fromUC/array_tests/test107.ams # 'ref for nature/subnature.
+#vhdl-ams/ad-hoc/fromUC/array_tests/test129.ams # broken syntax
+#vhdl-ams/ad-hoc/fromUC/array_tests/test130.ams # broken syntax
vhdl-ams/ad-hoc/fromUC/array_tests/test139.ams
-#vhdl-ams/ad-hoc/fromUC/array_tests/test186.ams # array
+#vhdl-ams/ad-hoc/fromUC/array_tests/test186.ams # broken: missing declaration
#vhdl-ams/ad-hoc/fromUC/attribute/across.ams # 'across
vhdl-ams/ad-hoc/fromUC/attribute/step_limit.ams
-#vhdl-ams/ad-hoc/fromUC/attribute/through.ams # 'trough
+#vhdl-ams/ad-hoc/fromUC/attribute/through.ams # 'through
#vhdl-ams/ad-hoc/fromUC/attribute/tick_contribution.ams # 'contrib
#vhdl-ams/ad-hoc/fromUC/attribute/tick_left.ams # array
#vhdl-ams/ad-hoc/fromUC/attribute/tick_reference.ams # ref
vhdl-ams/ad-hoc/fromUC/break_stmt/bouncing_ball.ams
vhdl-ams/ad-hoc/fromUC/break_stmt/lorenz_chaos.ams
vhdl-ams/ad-hoc/fromUC/break_stmt/precharged_capacitor.ams
-#vhdl-ams/ad-hoc/fromUC/break_stmt/test123.ams # syntax
+vhdl-ams/ad-hoc/fromUC/break_stmt/test123.ams
vhdl-ams/ad-hoc/fromUC/break_stmt/test133.ams
-#vhdl-ams/ad-hoc/fromUC/break_stmt/test134.ams # syntax
+#vhdl-ams/ad-hoc/fromUC/break_stmt/test134.ams # broken syntax
#vhdl-ams/ad-hoc/fromUC/break_stmt/test158.ams # syntax
-#vhdl-ams/ad-hoc/fromUC/break_stmt/test180.ams # syntax
-#vhdl-ams/ad-hoc/fromUC/break_stmt/test181.ams # syntax
+vhdl-ams/ad-hoc/fromUC/break_stmt/test180.ams
+vhdl-ams/ad-hoc/fromUC/break_stmt/test181.ams
#vhdl-ams/ad-hoc/fromUC/break_stmt/torsional_oscillator.ams # aggregate
vhdl-ams/ad-hoc/fromUC/free_equations/2nd_order_ode.ams
vhdl-ams/ad-hoc/fromUC/free_equations/test1.ams
vhdl-ams/ad-hoc/fromUC/free_equations/test2.ams
-#vhdl-ams/ad-hoc/fromUC/interface_models/above_attr.ams # write
+vhdl-ams/ad-hoc/fromUC/interface_models/above_attr.ams
vhdl-ams/ad-hoc/fromUC/interface_models/am_modulation.ams
-#vhdl-ams/ad-hoc/fromUC/interface_models/generic_model.ams # write
+vhdl-ams/ad-hoc/fromUC/interface_models/generic_model.ams
vhdl-ams/ad-hoc/fromUC/interface_models/mesh.ams
-#vhdl-ams/ad-hoc/fromUC/interface_models/mixed_model_1.ams # write
-#vhdl-ams/ad-hoc/fromUC/interface_models/mixed_model_2.ams # write
+vhdl-ams/ad-hoc/fromUC/interface_models/mixed_model_1.ams
+vhdl-ams/ad-hoc/fromUC/interface_models/mixed_model_2.ams
vhdl-ams/ad-hoc/fromUC/interface_models/multiple_res_comp.ams
vhdl-ams/ad-hoc/fromUC/interface_models/parallel-plate.ams
vhdl-ams/ad-hoc/fromUC/interface_models/parallel-plates4.ams
vhdl-ams/ad-hoc/fromUC/interface_models/res_component.ams
#vhdl-ams/ad-hoc/fromUC/inverter_model/inverter.ams # reference
-#vhdl-ams/ad-hoc/fromUC/mixed_tests/mixed_1.ams # write
-#vhdl-ams/ad-hoc/fromUC/mixed_tests/mixed_2.ams # write
+vhdl-ams/ad-hoc/fromUC/mixed_tests/mixed_1.ams
+vhdl-ams/ad-hoc/fromUC/mixed_tests/mixed_2.ams
vhdl-ams/ad-hoc/fromUC/regression_test/test100.ams
vhdl-ams/ad-hoc/fromUC/regression_test/test101.ams
vhdl-ams/ad-hoc/fromUC/regression_test/test102.ams
vhdl-ams/ad-hoc/fromUC/regression_test/test103.ams
-#vhdl-ams/ad-hoc/fromUC/regression_test/test104.ams # label ?
+#vhdl-ams/ad-hoc/fromUC/regression_test/test104.ams # syntax
#vhdl-ams/ad-hoc/fromUC/regression_test/test105.ams # redef
vhdl-ams/ad-hoc/fromUC/regression_test/test106.ams
#vhdl-ams/ad-hoc/fromUC/regression_test/test107.ams # 'ref
diff --git a/testsuite/vests/vhdl-ams/ashenden/files-ams.txt b/testsuite/vests/vhdl-ams/ashenden/files-ams.txt
index d31dafd30..60993daf5 100644
--- a/testsuite/vests/vhdl-ams/ashenden/files-ams.txt
+++ b/testsuite/vests/vhdl-ams/ashenden/files-ams.txt
@@ -21,7 +21,7 @@ vhdl-ams/ashenden/compliant/aliases/DMA_controller.vhd
vhdl-ams/ashenden/compliant/aliases/function_plus.vhd
vhdl-ams/ashenden/compliant/aliases/inline_01a.vhd
vhdl-ams/ashenden/compliant/aliases/inline_02.vhd
-#vhdl-ams/ashenden/compliant/aliases/inline_03a.vhd # record nature
+vhdl-ams/ashenden/compliant/aliases/inline_03a.vhd
vhdl-ams/ashenden/compliant/aliases/inline_04.vhd
vhdl-ams/ashenden/compliant/aliases/inline_05.vhd
#vhdl-ams/ashenden/compliant/aliases/inline_06.vhd # util
@@ -42,7 +42,7 @@ vhdl-ams/ashenden/compliant/AMS_CS2_Mixed_Tech/lead_lag_diff.vhd
#vhdl-ams/ashenden/compliant/AMS_CS2_Mixed_Tech/lead_lag_ztf.vhd # ztf
vhdl-ams/ashenden/compliant/AMS_CS2_Mixed_Tech/limiter.vhd
#vhdl-ams/ashenden/compliant/AMS_CS2_Mixed_Tech/lpf_1.vhd # ltf
-#vhdl-ams/ashenden/compliant/AMS_CS2_Mixed_Tech/stop_r.vhd # crash
+vhdl-ams/ashenden/compliant/AMS_CS2_Mixed_Tech/stop_r.vhd
vhdl-ams/ashenden/compliant/AMS_CS2_Mixed_Tech/sum2.vhd
#vhdl-ams/ashenden/compliant/AMS_CS2_Mixed_Tech/tb_CS2_Mech_Domain.vhd # spectrum
#vhdl-ams/ashenden/compliant/AMS_CS2_Mixed_Tech/tb_CS2_S_Domain.vhd #idem
@@ -93,24 +93,24 @@ vhdl-ams/ashenden/compliant/analog-modeling/inductor.vhd
vhdl-ams/ashenden/compliant/analog-modeling/inline_01a.vhd
vhdl-ams/ashenden/compliant/analog-modeling/inline_02a.vhd
vhdl-ams/ashenden/compliant/analog-modeling/inline_03a.vhd
-#vhdl-ams/ashenden/compliant/analog-modeling/inline_04a.vhd #record
-#vhdl-ams/ashenden/compliant/analog-modeling/inline_05a.vhd #record
-#vhdl-ams/ashenden/compliant/analog-modeling/inline_06a.vhd #record
+vhdl-ams/ashenden/compliant/analog-modeling/inline_04a.vhd
+vhdl-ams/ashenden/compliant/analog-modeling/inline_05a.vhd
+vhdl-ams/ashenden/compliant/analog-modeling/inline_06a.vhd
vhdl-ams/ashenden/compliant/analog-modeling/inline_07a.vhd
#vhdl-ams/ashenden/compliant/analog-modeling/inline_08a.vhd #crash
vhdl-ams/ashenden/compliant/analog-modeling/inline_09a.vhd
-#vhdl-ams/ashenden/compliant/analog-modeling/inline_10a.vhd #record
+#vhdl-ams/ashenden/compliant/analog-modeling/inline_10a.vhd # syntax
vhdl-ams/ashenden/compliant/analog-modeling/inline_11a.vhd
#vhdl-ams/ashenden/compliant/analog-modeling/inline_12a.vhd #case
#vhdl-ams/ashenden/compliant/analog-modeling/inline_13a.vhd #idem
#vhdl-ams/ashenden/compliant/analog-modeling/inline_14a.vhd #null
vhdl-ams/ashenden/compliant/analog-modeling/inline_15a.vhd
-#vhdl-ams/ashenden/compliant/analog-modeling/inline_16a.vhd #record?
+#vhdl-ams/ashenden/compliant/analog-modeling/inline_16a.vhd #assoc
vhdl-ams/ashenden/compliant/analog-modeling/inline_17a.vhd
vhdl-ams/ashenden/compliant/analog-modeling/inline_18a.vhd
vhdl-ams/ashenden/compliant/analog-modeling/inline_19a.vhd
vhdl-ams/ashenden/compliant/analog-modeling/inline_20a.vhd
-#vhdl-ams/ashenden/compliant/analog-modeling/inline_21a.vhd #spec
+#vhdl-ams/ashenden/compliant/analog-modeling/inline_21a.vhd #spec-all
vhdl-ams/ashenden/compliant/analog-modeling/inline_22a.vhd
vhdl-ams/ashenden/compliant/analog-modeling/inline_23a.vhd
vhdl-ams/ashenden/compliant/analog-modeling/inline_24a.vhd
@@ -124,8 +124,8 @@ vhdl-ams/ashenden/compliant/analog-modeling/moving_mass_wa.vhd
vhdl-ams/ashenden/compliant/analog-modeling/pendulum.vhd
vhdl-ams/ashenden/compliant/analog-modeling/pendulum_wa.vhd
vhdl-ams/ashenden/compliant/analog-modeling/piston.vhd
-#vhdl-ams/ashenden/compliant/analog-modeling/quad_opamp.vhd #crash
-#vhdl-ams/ashenden/compliant/analog-modeling/quad_opamp_wa.vhd #crash
+vhdl-ams/ashenden/compliant/analog-modeling/quad_opamp.vhd
+vhdl-ams/ashenden/compliant/analog-modeling/quad_opamp_wa.vhd
vhdl-ams/ashenden/compliant/analog-modeling/std_logic_to_analog.vhd
#vhdl-ams/ashenden/compliant/analog-modeling/tb_analog_switch.vhd #unit
#vhdl-ams/ashenden/compliant/analog-modeling/tb_bit_to_analog.vhd #lib
@@ -213,7 +213,7 @@ vhdl-ams/ashenden/compliant/composite-data/inline_05.vhd
vhdl-ams/ashenden/compliant/composite-data/inline_06a.vhd
#vhdl-ams/ashenden/compliant/composite-data/inline_07a.vhd #idem
vhdl-ams/ashenden/compliant/composite-data/inline_08.vhd
-#vhdl-ams/ashenden/compliant/composite-data/inline_09a.vhd #crash
+vhdl-ams/ashenden/compliant/composite-data/inline_09a.vhd
#vhdl-ams/ashenden/compliant/composite-data/inline_10.vhd #visibility
vhdl-ams/ashenden/compliant/composite-data/inline_11a.vhd
vhdl-ams/ashenden/compliant/composite-data/inline_12.vhd
@@ -221,7 +221,7 @@ vhdl-ams/ashenden/compliant/composite-data/inline_12.vhd
vhdl-ams/ashenden/compliant/composite-data/inline_14a.vhd
vhdl-ams/ashenden/compliant/composite-data/inline_15.vhd
vhdl-ams/ashenden/compliant/composite-data/inline_16.vhd
-#vhdl-ams/ashenden/compliant/composite-data/inline_17a.vhd #record
+vhdl-ams/ashenden/compliant/composite-data/inline_17a.vhd
vhdl-ams/ashenden/compliant/composite-data/modem_controller.vhd
vhdl-ams/ashenden/compliant/composite-data/tb_and_multiple.vhd
vhdl-ams/ashenden/compliant/composite-data/tb_byte_swap.vhd
@@ -336,7 +336,7 @@ vhdl-ams/ashenden/compliant/frequency-modeling/opamp.vhd
#vhdl-ams/ashenden/compliant/frequency-modeling/tb_opamp_2pole.vhd #lib
#vhdl-ams/ashenden/compliant/frequency-modeling/tb_v_source.vhd #lib
#vhdl-ams/ashenden/compliant/frequency-modeling/v_source-1.vhd #quan
-#vhdl-ams/ashenden/compliant/frequency-modeling/v_source.vhd #quan
+vhdl-ams/ashenden/compliant/frequency-modeling/v_source.vhd
vhdl-ams/ashenden/compliant/fundamental/d_ff.vhd
vhdl-ams/ashenden/compliant/fundamental/vc_amp.vhd
#vhdl-ams/ashenden/compliant/fundamental/adc.vhd #lib
@@ -507,9 +507,9 @@ vhdl-ams/ashenden/compliant/subprograms/inline_08.vhd
vhdl-ams/ashenden/compliant/subprograms/instruction_interpreter-1.vhd
vhdl-ams/ashenden/compliant/subprograms/instruction_interpreter.vhd
vhdl-ams/ashenden/compliant/subprograms/limited.vhd
-#vhdl-ams/ashenden/compliant/subprograms/mixer.vhd #crash sub
-#vhdl-ams/ashenden/compliant/subprograms/mixer_wa.vhd #crash sub
-#vhdl-ams/ashenden/compliant/subprograms/motor_system.vhd #idem
+vhdl-ams/ashenden/compliant/subprograms/mixer.vhd
+vhdl-ams/ashenden/compliant/subprograms/mixer_wa.vhd
+vhdl-ams/ashenden/compliant/subprograms/motor_system.vhd
vhdl-ams/ashenden/compliant/subprograms/motor_system_wa.vhd
vhdl-ams/ashenden/compliant/subprograms/negate.vhd
vhdl-ams/ashenden/compliant/subprograms/network_driver.vhd