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| author | Patrick Lehmann <Patrick.Lehmann@plc2.de> | 2021-06-18 10:19:59 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2021-06-18 19:19:27 +0200 |
| commit | 823ee7dd560da1e8f08a34685c03f98ccc89b390 (patch) | |
| tree | 9b628795399605aa478ab2e95feec7004ca43575 /testsuite | |
| parent | 05755b53e1d723ff4d2c9de79c61badd42491b13 (diff) | |
| download | ghdl-823ee7dd560da1e8f08a34685c03f98ccc89b390.tar.gz ghdl-823ee7dd560da1e8f08a34685c03f98ccc89b390.tar.bz2 ghdl-823ee7dd560da1e8f08a34685c03f98ccc89b390.zip | |
Added handling of Floating Point.
Diffstat (limited to 'testsuite')
| -rw-r--r-- | testsuite/pyunit/SimpleEntity.vhdl | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/testsuite/pyunit/SimpleEntity.vhdl b/testsuite/pyunit/SimpleEntity.vhdl index 98d0afbb7..9997c8d6d 100644 --- a/testsuite/pyunit/SimpleEntity.vhdl +++ b/testsuite/pyunit/SimpleEntity.vhdl @@ -4,11 +4,12 @@ use ieee.numeric_std.all; entity entity_1 is generic ( + FREQ : real := 100.0; BITS : positive := 8 ); port ( Clock: in std_logic; - Reset: in std_logic; + Reset: in std_logic := '0'; Q: out std_logic_vector(BITS - 1 downto 0) ); end entity entity_1; |