Fix bug20312: rewrite of complex types.

Fix crashes in sem_expr when string literals are used in range exprs.

3 files changed, 101 insertions, 0 deletions

diff --git a/testsuite/gna/bug20312/arr.vhdl b/testsuite/gna/bug20312/arr.vhdl
new file mode 100644
index 000000000..cad470e17
--- /dev/null
+++ b/testsuite/gna/bug20312/arr.vhdl
@@ -0,0 +1,15 @@
+entity arr is
+  generic (width : natural := 4);
+end arr;
+
+architecture behav of arr is
+  subtype line is bit_vector (1 to width);
+  type memory is array (0 to 7) of line;
+begin
+  process is
+    variable l : line;
+    variable mem : memory;
+  begin
+    wait;
+  end process;
+end behav;
diff --git a/testsuite/gna/bug20312/repro.vhdl b/testsuite/gna/bug20312/repro.vhdl
new file mode 100644
index 000000000..8a606ee3d
--- /dev/null
+++ b/testsuite/gna/bug20312/repro.vhdl
@@ -0,0 +1,73 @@
+entity pipeline is
+  generic (width : natural; depth : natural);
+  port (i : bit_vector (1 to width);
+        o : out bit_vector (1 to width);  
+        clk : bit);
+end pipeline;
+
+architecture behav of pipeline is
+  type pipe is array (1 to depth) of bit_vector (1 to width);
+begin
+  process (clk) is
+    variable tmp : pipe;
+  begin
+    if clk = '1' then
+      o <= tmp (1);
+      tmp (1 to depth - 1) := tmp (2 to depth);
+      tmp (depth) := i;
+    end if;
+  end process;
+end behav;
+
+entity tb is
+end tb;
+
+architecture behav of tb is
+  constant width : natural := 4;
+  signal i : bit_vector (1 to width);
+  signal o : bit_vector (1 to width);
+  signal clk : bit;
+begin
+  p : entity work.pipeline
+    generic map (width => width, depth => 3)
+    port map (i => i, o => o, clk => clk);
+  process is
+  begin
+    i <= "1011";
+    
+    clk <= '0';
+    wait for 0 ns;
+    clk <= '1';
+    wait for 0 ns;
+
+    i <= "1010";
+    
+    clk <= '0';
+    wait for 0 ns;
+    clk <= '1';
+    wait for 0 ns;
+
+    i <= "1001";
+    
+    clk <= '0';
+    wait for 0 ns;
+    clk <= '1';
+    wait for 0 ns;
+
+    i <= "1000";
+    
+    clk <= '0';
+    wait for 0 ns;
+    clk <= '1';
+    wait for 0 ns;
+
+    i <= "1011";
+    
+    clk <= '0';
+    wait for 0 ns;
+    clk <= '1';
+    wait for 0 ns;
+
+    wait;
+  end process;
+end behav;
diff --git a/testsuite/gna/bug20312/testsuite.sh b/testsuite/gna/bug20312/testsuite.sh
new file mode 100755
index 000000000..d73c6cd77
--- /dev/null
+++ b/testsuite/gna/bug20312/testsuite.sh
@@ -0,0 +1,13 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+analyze repro.vhdl
+elab_simulate tb
+
+analyze arr.vhdl
+elab_simulate arr
+
+clean
+
+echo "Test successful"