Add testcase for previous (individual assoc for unbounded record).

3 files changed, 74 insertions, 0 deletions

diff --git a/testsuite/gna/bug077/repro.vhdl b/testsuite/gna/bug077/repro.vhdl
new file mode 100644
index 000000000..c8d6fd04e
--- /dev/null
+++ b/testsuite/gna/bug077/repro.vhdl
@@ -0,0 +1,37 @@
+package pkg is
+  type my_inputs is record
+    a : bit;
+    w : bit_vector;
+  end record;
+end pkg;
+
+use work.pkg.all;
+entity child is
+  port (i : my_inputs);
+end;
+
+architecture behav of child is
+begin
+  assert i.w = (i.w'range => i.a);
+end behav;
+
+entity repro is
+end repro;
+
+use work.pkg.all;
+architecture behav of repro is
+  signal s : bit_vector (7 downto 0);
+  signal a : bit;
+begin
+  inst : entity work.child
+    port map(
+      i.a => a,
+      i.w => s);
+
+  process
+  begin
+    a <= '0';
+    s <= x"01";
+    wait;
+  end process;
+end;
diff --git a/testsuite/gna/bug077/repro2.vhdl b/testsuite/gna/bug077/repro2.vhdl
new file mode 100644
index 000000000..daffca27a
--- /dev/null
+++ b/testsuite/gna/bug077/repro2.vhdl
@@ -0,0 +1,26 @@
+entity child2 is
+  port (i : bit_vector);
+end;
+
+architecture behav of child2 is
+begin
+  assert i = (i'range => '0');
+end behav;
+
+entity repro2 is
+end repro2;
+
+architecture behav of repro2 is
+  signal s : bit_vector (7 downto 0);
+begin
+  inst : entity work.child2
+    port map(
+      i(0) => s(1),
+      i(1) => s(0));
+
+  process
+  begin
+    s <= x"01";
+    wait;
+  end process;
+end;
diff --git a/testsuite/gna/bug077/testsuite.sh b/testsuite/gna/bug077/testsuite.sh
new file mode 100755
index 000000000..8d22a2073
--- /dev/null
+++ b/testsuite/gna/bug077/testsuite.sh
@@ -0,0 +1,11 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze repro.vhdl
+elab_simulate repro
+
+clean
+
+echo "Test successful"