diff options
| -rw-r--r-- | src/std_names.adb | 3 | ||||
| -rw-r--r-- | src/std_names.ads | 5 |
2 files changed, 7 insertions, 1 deletions
diff --git a/src/std_names.adb b/src/std_names.adb index f19556bc1..3a5cb9c9f 100644 --- a/src/std_names.adb +++ b/src/std_names.adb @@ -625,6 +625,9 @@ package body Std_Names is Def ("to_integer", Name_To_Integer); Def ("to_unsigned", Name_To_Unsigned); Def ("to_signed", Name_To_Signed); + Def ("math_real", Name_Math_Real); + Def ("ceil", Name_Ceil); + Def ("log2", Name_Log2); -- Verilog directives Def ("define", Name_Define); diff --git a/src/std_names.ads b/src/std_names.ads index de5af8131..44a6b8495 100644 --- a/src/std_names.ads +++ b/src/std_names.ads @@ -708,7 +708,10 @@ package Std_Names is Name_To_Integer : constant Name_Id := Name_First_Ieee + 019; Name_To_Unsigned : constant Name_Id := Name_First_Ieee + 020; Name_To_Signed : constant Name_Id := Name_First_Ieee + 021; - Name_Last_Ieee : constant Name_Id := Name_To_Signed; + Name_Math_Real : constant Name_Id := Name_First_Ieee + 022; + Name_Ceil : constant Name_Id := Name_First_Ieee + 023; + Name_Log2 : constant Name_Id := Name_First_Ieee + 024; + Name_Last_Ieee : constant Name_Id := Name_Log2; -- Verilog Directives. Name_First_Directive : constant Name_Id := Name_Last_Ieee + 1; |