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-rw-r--r--src/simul/simul-vhdl_elab.adb5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/simul/simul-vhdl_elab.adb b/src/simul/simul-vhdl_elab.adb
index 89e75e7c7..52f98817b 100644
--- a/src/simul/simul-vhdl_elab.adb
+++ b/src/simul/simul-vhdl_elab.adb
@@ -1020,7 +1020,10 @@ package body Simul.Vhdl_Elab is
if Ns.Total = 0 and then Is_Out then
Ns.Total := 1;
end if;
- if E.Collapsed_By /= No_Signal_Index then
+ if E.Collapsed_By /= No_Signal_Index
+ and then (Signals_Table.Table (E.Collapsed_By).Kind
+ in Mode_Signal_User)
+ then
-- Add to the parent.
declare
C_Ns : Nbr_Sources_Type renames