diff options
-rw-r--r-- | python/libghdl/thin/std_names.py | 382 | ||||
-rw-r--r-- | python/libghdl/thin/vhdl/nodes.py | 438 | ||||
-rw-r--r-- | src/std_names.adb | 4 | ||||
-rw-r--r-- | src/std_names.ads | 26 | ||||
-rw-r--r-- | src/synth/synth-oper.adb | 3 | ||||
-rw-r--r-- | src/vhdl/vhdl-ieee-std_logic_1164.adb | 43 | ||||
-rw-r--r-- | src/vhdl/vhdl-nodes.ads | 6 |
7 files changed, 485 insertions, 417 deletions
diff --git a/python/libghdl/thin/std_names.py b/python/libghdl/thin/std_names.py index 5f3143531..faa0e84c1 100644 --- a/python/libghdl/thin/std_names.py +++ b/python/libghdl/thin/std_names.py @@ -591,192 +591,196 @@ class Name: Shift_Right = 805 Rotate_Left = 806 Rotate_Right = 807 - To_Bitvector = 808 - Is_X = 809 - Conv_Signed = 810 - Conv_Unsigned = 811 - Conv_Integer = 812 - Math_Real = 813 - Ceil = 814 - Round = 815 - Log2 = 816 - Sin = 817 - Cos = 818 - Last_Ieee = 818 - First_Synthesis = 819 - Allconst = 819 - Allseq = 820 - Anyconst = 821 - Anyseq = 822 - Last_Synthesis = 822 - First_Directive = 823 - Define = 823 - Endif = 824 - Ifdef = 825 - Ifndef = 826 - Include = 827 - Timescale = 828 - Undef = 829 - Protect = 830 - Begin_Protected = 831 - End_Protected = 832 - Key_Block = 833 - Data_Block = 834 - Line = 835 - Celldefine = 836 - Endcelldefine = 837 - Default_Nettype = 838 - Resetall = 839 - Last_Directive = 839 - First_Systask = 840 - Bits = 840 - D_Root = 841 - D_Unit = 842 - Last_Systask = 842 - First_SV_Method = 843 - Size = 843 - Insert = 844 - Delete = 845 - Pop_Front = 846 - Pop_Back = 847 - Push_Front = 848 - Push_Back = 849 - Name = 850 - Len = 851 - Substr = 852 - Exists = 853 - Atoi = 854 - Itoa = 855 - Find = 856 - Find_Index = 857 - Find_First = 858 - Find_First_Index = 859 - Find_Last = 860 - Find_Last_Index = 861 - Num = 862 - Randomize = 863 - Pre_Randomize = 864 - Post_Randomize = 865 - Srandom = 866 - Get_Randstate = 867 - Set_Randstate = 868 - Seed = 869 - State = 870 - Last_SV_Method = 870 - First_BSV = 871 - uAction = 871 - uActionValue = 872 - BVI = 873 - uC = 874 - uCF = 875 - uE = 876 - uSB = 877 - uSBR = 878 - Action = 879 - Endaction = 880 - Actionvalue = 881 - Endactionvalue = 882 - Ancestor = 883 - Clocked_By = 884 - Default_Clock = 885 - Default_Reset = 886 - Dependencies = 887 - Deriving = 888 - Determines = 889 - Enable = 890 - Ifc_Inout = 891 - Input_Clock = 892 - Input_Reset = 893 - Instance = 894 - Endinstance = 895 - Let = 896 - Match = 897 - Method = 898 - Endmethod = 899 - Numeric = 900 - Output_Clock = 901 - Output_Reset = 902 - Par = 903 - Endpar = 904 - Path = 905 - Provisos = 906 - Ready = 907 - Reset_By = 908 - Rule = 909 - Endrule = 910 - Rules = 911 - Endrules = 912 - Same_Family = 913 - Schedule = 914 - Seq = 915 - Endseq = 916 - Typeclass = 917 - Endtypeclass = 918 - Valueof = 919 - uValueof = 920 - Last_BSV = 920 - First_Comment = 921 - Psl = 921 - Pragma = 922 - Synthesis = 923 - Synopsys = 924 - Translate_Off = 925 - Translate_On = 926 - Last_Comment = 926 - First_PSL = 927 - A = 927 - Af = 928 - Ag = 929 - Ax = 930 - Abort = 931 - Assume_Guarantee = 932 - Before = 933 - Clock = 934 - E = 935 - Ef = 936 - Eg = 937 - Ex = 938 - Endpoint = 939 - Eventually = 940 - Fairness = 941 - Fell = 942 - Forall = 943 - G = 944 - Inf = 945 - Inherit = 946 - Never = 947 - Next_A = 948 - Next_E = 949 - Next_Event = 950 - Next_Event_A = 951 - Next_Event_E = 952 - Prev = 953 - Rose = 954 - Strong = 955 - W = 956 - Whilenot = 957 - Within = 958 - X = 959 - Last_PSL = 959 - First_Edif = 960 - Celltype = 970 - View = 971 - Viewtype = 972 - Direction = 973 - Contents = 974 - Net = 975 - Viewref = 976 - Cellref = 977 - Libraryref = 978 - Portinstance = 979 - Joined = 980 - Portref = 981 - Instanceref = 982 - Design = 983 - Designator = 984 - Owner = 985 - Member = 986 - Number = 987 - Rename = 988 - Userdata = 989 - Last_Edif = 989 + To_Bit = 808 + To_Bitvector = 809 + To_Stdulogic = 810 + To_Stdlogicvector = 811 + To_Stdulogicvector = 812 + Is_X = 813 + Conv_Signed = 814 + Conv_Unsigned = 815 + Conv_Integer = 816 + Math_Real = 817 + Ceil = 818 + Round = 819 + Log2 = 820 + Sin = 821 + Cos = 822 + Last_Ieee = 822 + First_Synthesis = 823 + Allconst = 823 + Allseq = 824 + Anyconst = 825 + Anyseq = 826 + Last_Synthesis = 826 + First_Directive = 827 + Define = 827 + Endif = 828 + Ifdef = 829 + Ifndef = 830 + Include = 831 + Timescale = 832 + Undef = 833 + Protect = 834 + Begin_Protected = 835 + End_Protected = 836 + Key_Block = 837 + Data_Block = 838 + Line = 839 + Celldefine = 840 + Endcelldefine = 841 + Default_Nettype = 842 + Resetall = 843 + Last_Directive = 843 + First_Systask = 844 + Bits = 844 + D_Root = 845 + D_Unit = 846 + Last_Systask = 846 + First_SV_Method = 847 + Size = 847 + Insert = 848 + Delete = 849 + Pop_Front = 850 + Pop_Back = 851 + Push_Front = 852 + Push_Back = 853 + Name = 854 + Len = 855 + Substr = 856 + Exists = 857 + Atoi = 858 + Itoa = 859 + Find = 860 + Find_Index = 861 + Find_First = 862 + Find_First_Index = 863 + Find_Last = 864 + Find_Last_Index = 865 + Num = 866 + Randomize = 867 + Pre_Randomize = 868 + Post_Randomize = 869 + Srandom = 870 + Get_Randstate = 871 + Set_Randstate = 872 + Seed = 873 + State = 874 + Last_SV_Method = 874 + First_BSV = 875 + uAction = 875 + uActionValue = 876 + BVI = 877 + uC = 878 + uCF = 879 + uE = 880 + uSB = 881 + uSBR = 882 + Action = 883 + Endaction = 884 + Actionvalue = 885 + Endactionvalue = 886 + Ancestor = 887 + Clocked_By = 888 + Default_Clock = 889 + Default_Reset = 890 + Dependencies = 891 + Deriving = 892 + Determines = 893 + Enable = 894 + Ifc_Inout = 895 + Input_Clock = 896 + Input_Reset = 897 + Instance = 898 + Endinstance = 899 + Let = 900 + Match = 901 + Method = 902 + Endmethod = 903 + Numeric = 904 + Output_Clock = 905 + Output_Reset = 906 + Par = 907 + Endpar = 908 + Path = 909 + Provisos = 910 + Ready = 911 + Reset_By = 912 + Rule = 913 + Endrule = 914 + Rules = 915 + Endrules = 916 + Same_Family = 917 + Schedule = 918 + Seq = 919 + Endseq = 920 + Typeclass = 921 + Endtypeclass = 922 + Valueof = 923 + uValueof = 924 + Last_BSV = 924 + First_Comment = 925 + Psl = 925 + Pragma = 926 + Synthesis = 927 + Synopsys = 928 + Translate_Off = 929 + Translate_On = 930 + Last_Comment = 930 + First_PSL = 931 + A = 931 + Af = 932 + Ag = 933 + Ax = 934 + Abort = 935 + Assume_Guarantee = 936 + Before = 937 + Clock = 938 + E = 939 + Ef = 940 + Eg = 941 + Ex = 942 + Endpoint = 943 + Eventually = 944 + Fairness = 945 + Fell = 946 + Forall = 947 + G = 948 + Inf = 949 + Inherit = 950 + Never = 951 + Next_A = 952 + Next_E = 953 + Next_Event = 954 + Next_Event_A = 955 + Next_Event_E = 956 + Prev = 957 + Rose = 958 + Strong = 959 + W = 960 + Whilenot = 961 + Within = 962 + X = 963 + Last_PSL = 963 + First_Edif = 964 + Celltype = 974 + View = 975 + Viewtype = 976 + Direction = 977 + Contents = 978 + Net = 979 + Viewref = 980 + Cellref = 981 + Libraryref = 982 + Portinstance = 983 + Joined = 984 + Portref = 985 + Instanceref = 986 + Design = 987 + Designator = 988 + Owner = 989 + Member = 990 + Number = 991 + Rename = 992 + Userdata = 993 + Last_Edif = 993 diff --git a/python/libghdl/thin/vhdl/nodes.py b/python/libghdl/thin/vhdl/nodes.py index 5ec9e04f1..2e4f2a030 100644 --- a/python/libghdl/thin/vhdl/nodes.py +++ b/python/libghdl/thin/vhdl/nodes.py @@ -1171,222 +1171,228 @@ class Iir_Predefined: Ieee_1164_Vector_Xor = 188 Ieee_1164_Vector_Xnor = 189 Ieee_1164_Vector_Not = 190 - Ieee_1164_To_Bitvector = 191 - Ieee_1164_Vector_Is_X = 192 - Ieee_1164_Scalar_Is_X = 193 - Ieee_1164_Rising_Edge = 194 - Ieee_1164_Falling_Edge = 195 - Ieee_1164_Vector_And_Reduce = 196 - Ieee_1164_Vector_Or_Reduce = 197 - Ieee_1164_Vector_Sll = 198 - Ieee_1164_Vector_Srl = 199 - Ieee_1164_Vector_Rol = 200 - Ieee_1164_Vector_Ror = 201 - Ieee_1164_Condition_Operator = 202 - Ieee_Numeric_Std_Toint_Uns_Nat = 203 - Ieee_Numeric_Std_Toint_Sgn_Int = 204 - Ieee_Numeric_Std_Touns_Nat_Nat_Uns = 205 - Ieee_Numeric_Std_Touns_Nat_Uns_Uns = 206 - Ieee_Numeric_Std_Tosgn_Int_Nat_Sgn = 207 - Ieee_Numeric_Std_Tosgn_Int_Sgn_Sgn = 208 - Ieee_Numeric_Std_Resize_Uns_Nat = 209 - Ieee_Numeric_Std_Resize_Sgn_Nat = 210 - Ieee_Numeric_Std_Resize_Uns_Uns = 211 - Ieee_Numeric_Std_Resize_Sgn_Sgn = 212 - Ieee_Numeric_Std_Add_Uns_Uns = 213 - Ieee_Numeric_Std_Add_Uns_Nat = 214 - Ieee_Numeric_Std_Add_Nat_Uns = 215 - Ieee_Numeric_Std_Add_Uns_Log = 216 - Ieee_Numeric_Std_Add_Log_Uns = 217 - Ieee_Numeric_Std_Add_Sgn_Sgn = 218 - Ieee_Numeric_Std_Add_Sgn_Int = 219 - Ieee_Numeric_Std_Add_Int_Sgn = 220 - Ieee_Numeric_Std_Add_Sgn_Log = 221 - Ieee_Numeric_Std_Add_Log_Sgn = 222 - Ieee_Numeric_Std_Sub_Uns_Uns = 223 - Ieee_Numeric_Std_Sub_Uns_Nat = 224 - Ieee_Numeric_Std_Sub_Nat_Uns = 225 - Ieee_Numeric_Std_Sub_Uns_Log = 226 - Ieee_Numeric_Std_Sub_Log_Uns = 227 - Ieee_Numeric_Std_Sub_Sgn_Sgn = 228 - Ieee_Numeric_Std_Sub_Sgn_Int = 229 - Ieee_Numeric_Std_Sub_Int_Sgn = 230 - Ieee_Numeric_Std_Sub_Sgn_Log = 231 - Ieee_Numeric_Std_Sub_Log_Sgn = 232 - Ieee_Numeric_Std_Mul_Uns_Uns = 233 - Ieee_Numeric_Std_Mul_Uns_Nat = 234 - Ieee_Numeric_Std_Mul_Nat_Uns = 235 - Ieee_Numeric_Std_Mul_Sgn_Sgn = 236 - Ieee_Numeric_Std_Mul_Sgn_Int = 237 - Ieee_Numeric_Std_Mul_Int_Sgn = 238 - Ieee_Numeric_Std_Div_Uns_Uns = 239 - Ieee_Numeric_Std_Div_Uns_Nat = 240 - Ieee_Numeric_Std_Div_Nat_Uns = 241 - Ieee_Numeric_Std_Div_Sgn_Sgn = 242 - Ieee_Numeric_Std_Div_Sgn_Int = 243 - Ieee_Numeric_Std_Div_Int_Sgn = 244 - Ieee_Numeric_Std_Gt_Uns_Uns = 245 - Ieee_Numeric_Std_Gt_Uns_Nat = 246 - Ieee_Numeric_Std_Gt_Nat_Uns = 247 - Ieee_Numeric_Std_Gt_Sgn_Sgn = 248 - Ieee_Numeric_Std_Gt_Sgn_Int = 249 - Ieee_Numeric_Std_Gt_Int_Sgn = 250 - Ieee_Numeric_Std_Lt_Uns_Uns = 251 - Ieee_Numeric_Std_Lt_Uns_Nat = 252 - Ieee_Numeric_Std_Lt_Nat_Uns = 253 - Ieee_Numeric_Std_Lt_Sgn_Sgn = 254 - Ieee_Numeric_Std_Lt_Sgn_Int = 255 - Ieee_Numeric_Std_Lt_Int_Sgn = 256 - Ieee_Numeric_Std_Le_Uns_Uns = 257 - Ieee_Numeric_Std_Le_Uns_Nat = 258 - Ieee_Numeric_Std_Le_Nat_Uns = 259 - Ieee_Numeric_Std_Le_Sgn_Sgn = 260 - Ieee_Numeric_Std_Le_Sgn_Int = 261 - Ieee_Numeric_Std_Le_Int_Sgn = 262 - Ieee_Numeric_Std_Ge_Uns_Uns = 263 - Ieee_Numeric_Std_Ge_Uns_Nat = 264 - Ieee_Numeric_Std_Ge_Nat_Uns = 265 - Ieee_Numeric_Std_Ge_Sgn_Sgn = 266 - Ieee_Numeric_Std_Ge_Sgn_Int = 267 - Ieee_Numeric_Std_Ge_Int_Sgn = 268 - Ieee_Numeric_Std_Eq_Uns_Uns = 269 - Ieee_Numeric_Std_Eq_Uns_Nat = 270 - Ieee_Numeric_Std_Eq_Nat_Uns = 271 - Ieee_Numeric_Std_Eq_Sgn_Sgn = 272 - Ieee_Numeric_Std_Eq_Sgn_Int = 273 - Ieee_Numeric_Std_Eq_Int_Sgn = 274 - Ieee_Numeric_Std_Ne_Uns_Uns = 275 - Ieee_Numeric_Std_Ne_Uns_Nat = 276 - Ieee_Numeric_Std_Ne_Nat_Uns = 277 - Ieee_Numeric_Std_Ne_Sgn_Sgn = 278 - Ieee_Numeric_Std_Ne_Sgn_Int = 279 - Ieee_Numeric_Std_Ne_Int_Sgn = 280 - Ieee_Numeric_Std_Match_Gt_Uns_Uns = 281 - Ieee_Numeric_Std_Match_Gt_Uns_Nat = 282 - Ieee_Numeric_Std_Match_Gt_Nat_Uns = 283 - Ieee_Numeric_Std_Match_Gt_Sgn_Sgn = 284 - Ieee_Numeric_Std_Match_Gt_Sgn_Int = 285 - Ieee_Numeric_Std_Match_Gt_Int_Sgn = 286 - Ieee_Numeric_Std_Match_Lt_Uns_Uns = 287 - Ieee_Numeric_Std_Match_Lt_Uns_Nat = 288 - Ieee_Numeric_Std_Match_Lt_Nat_Uns = 289 - Ieee_Numeric_Std_Match_Lt_Sgn_Sgn = 290 - Ieee_Numeric_Std_Match_Lt_Sgn_Int = 291 - Ieee_Numeric_Std_Match_Lt_Int_Sgn = 292 - Ieee_Numeric_Std_Match_Le_Uns_Uns = 293 - Ieee_Numeric_Std_Match_Le_Uns_Nat = 294 - Ieee_Numeric_Std_Match_Le_Nat_Uns = 295 - Ieee_Numeric_Std_Match_Le_Sgn_Sgn = 296 - Ieee_Numeric_Std_Match_Le_Sgn_Int = 297 - Ieee_Numeric_Std_Match_Le_Int_Sgn = 298 - Ieee_Numeric_Std_Match_Ge_Uns_Uns = 299 - Ieee_Numeric_Std_Match_Ge_Uns_Nat = 300 - Ieee_Numeric_Std_Match_Ge_Nat_Uns = 301 - Ieee_Numeric_Std_Match_Ge_Sgn_Sgn = 302 - Ieee_Numeric_Std_Match_Ge_Sgn_Int = 303 - Ieee_Numeric_Std_Match_Ge_Int_Sgn = 304 - Ieee_Numeric_Std_Match_Eq_Uns_Uns = 305 - Ieee_Numeric_Std_Match_Eq_Uns_Nat = 306 - Ieee_Numeric_Std_Match_Eq_Nat_Uns = 307 - Ieee_Numeric_Std_Match_Eq_Sgn_Sgn = 308 - Ieee_Numeric_Std_Match_Eq_Sgn_Int = 309 - Ieee_Numeric_Std_Match_Eq_Int_Sgn = 310 - Ieee_Numeric_Std_Match_Ne_Uns_Uns = 311 - Ieee_Numeric_Std_Match_Ne_Uns_Nat = 312 - Ieee_Numeric_Std_Match_Ne_Nat_Uns = 313 - Ieee_Numeric_Std_Match_Ne_Sgn_Sgn = 314 - Ieee_Numeric_Std_Match_Ne_Sgn_Int = 315 - Ieee_Numeric_Std_Match_Ne_Int_Sgn = 316 - Ieee_Numeric_Std_Shl_Uns_Nat = 317 - Ieee_Numeric_Std_Shr_Uns_Nat = 318 - Ieee_Numeric_Std_Shl_Sgn_Nat = 319 - Ieee_Numeric_Std_Shr_Sgn_Nat = 320 - Ieee_Numeric_Std_Sll_Uns_Int = 321 - Ieee_Numeric_Std_Sll_Sgn_Int = 322 - Ieee_Numeric_Std_Srl_Uns_Int = 323 - Ieee_Numeric_Std_Srl_Sgn_Int = 324 - Ieee_Numeric_Std_Sla_Uns_Int = 325 - Ieee_Numeric_Std_Sla_Sgn_Int = 326 - Ieee_Numeric_Std_Sra_Uns_Int = 327 - Ieee_Numeric_Std_Sra_Sgn_Int = 328 - Ieee_Numeric_Std_Rol_Uns_Nat = 329 - Ieee_Numeric_Std_Ror_Uns_Nat = 330 - Ieee_Numeric_Std_Rol_Sgn_Nat = 331 - Ieee_Numeric_Std_Ror_Sgn_Nat = 332 - Ieee_Numeric_Std_Not_Uns = 333 - Ieee_Numeric_Std_Not_Sgn = 334 - Ieee_Numeric_Std_Abs_Sgn = 335 - Ieee_Numeric_Std_And_Uns_Uns = 336 - Ieee_Numeric_Std_And_Sgn_Sgn = 337 - Ieee_Numeric_Std_Or_Uns_Uns = 338 - Ieee_Numeric_Std_Or_Sgn_Sgn = 339 - Ieee_Numeric_Std_Nand_Uns_Uns = 340 - Ieee_Numeric_Std_Nand_Sgn_Sgn = 341 - Ieee_Numeric_Std_Nor_Uns_Uns = 342 - Ieee_Numeric_Std_Nor_Sgn_Sgn = 343 - Ieee_Numeric_Std_Xor_Uns_Uns = 344 - Ieee_Numeric_Std_Xor_Sgn_Sgn = 345 - Ieee_Numeric_Std_Xnor_Uns_Uns = 346 - Ieee_Numeric_Std_Xnor_Sgn_Sgn = 347 - Ieee_Numeric_Std_Neg_Uns = 348 - Ieee_Numeric_Std_Neg_Sgn = 349 - Ieee_Numeric_Std_Match_Log = 350 - Ieee_Numeric_Std_Match_Uns = 351 - Ieee_Numeric_Std_Match_Sgn = 352 - Ieee_Numeric_Std_Match_Slv = 353 - Ieee_Numeric_Std_Match_Suv = 354 - Ieee_Math_Real_Ceil = 355 - Ieee_Math_Real_Round = 356 - Ieee_Math_Real_Log2 = 357 - Ieee_Math_Real_Sin = 358 - Ieee_Math_Real_Cos = 359 - Ieee_Std_Logic_Unsigned_Add_Slv_Slv = 360 - Ieee_Std_Logic_Unsigned_Add_Slv_Int = 361 - Ieee_Std_Logic_Unsigned_Add_Int_Slv = 362 - Ieee_Std_Logic_Unsigned_Add_Slv_Sl = 363 - Ieee_Std_Logic_Unsigned_Add_Sl_Slv = 364 - Ieee_Std_Logic_Unsigned_Sub_Slv_Slv = 365 - Ieee_Std_Logic_Unsigned_Sub_Slv_Int = 366 - Ieee_Std_Logic_Unsigned_Sub_Int_Slv = 367 - Ieee_Std_Logic_Unsigned_Sub_Slv_Sl = 368 - Ieee_Std_Logic_Unsigned_Sub_Sl_Slv = 369 - Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 370 - Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 371 - Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 372 - Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 373 - Ieee_Std_Logic_Unsigned_Le_Slv_Int = 374 - Ieee_Std_Logic_Unsigned_Le_Int_Slv = 375 - Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 376 - Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 377 - Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 378 - Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 379 - Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 380 - Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 381 - Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 382 - Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 383 - Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 384 - Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 385 - Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 386 - Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 387 - Ieee_Std_Logic_Unsigned_Conv_Integer = 388 - Ieee_Std_Logic_Signed_Add_Slv_Slv = 389 - Ieee_Std_Logic_Signed_Add_Slv_Int = 390 - Ieee_Std_Logic_Signed_Add_Int_Slv = 391 - Ieee_Std_Logic_Signed_Add_Slv_Sl = 392 - Ieee_Std_Logic_Signed_Add_Sl_Slv = 393 - Ieee_Std_Logic_Signed_Sub_Slv_Slv = 394 - Ieee_Std_Logic_Signed_Sub_Slv_Int = 395 - Ieee_Std_Logic_Signed_Sub_Int_Slv = 396 - Ieee_Std_Logic_Signed_Sub_Slv_Sl = 397 - Ieee_Std_Logic_Signed_Sub_Sl_Slv = 398 - Ieee_Std_Logic_Arith_Conv_Unsigned_Int = 399 - Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 400 - Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 401 - Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 402 - Ieee_Std_Logic_Arith_Conv_Integer_Int = 403 - Ieee_Std_Logic_Arith_Conv_Integer_Uns = 404 - Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 405 - Ieee_Std_Logic_Arith_Conv_Integer_Log = 406 + Ieee_1164_To_Bit = 191 + Ieee_1164_To_Bitvector = 192 + Ieee_1164_To_Stdulogic = 193 + Ieee_1164_To_Stdlogicvector_Bv = 194 + Ieee_1164_To_Stdlogicvector_Suv = 195 + Ieee_1164_To_Stdulogicvector_Bv = 196 + Ieee_1164_To_Stdulogicvector_Slv = 197 + Ieee_1164_Vector_Is_X = 198 + Ieee_1164_Scalar_Is_X = 199 + Ieee_1164_Rising_Edge = 200 + Ieee_1164_Falling_Edge = 201 + Ieee_1164_Vector_And_Reduce = 202 + Ieee_1164_Vector_Or_Reduce = 203 + Ieee_1164_Vector_Sll = 204 + Ieee_1164_Vector_Srl = 205 + Ieee_1164_Vector_Rol = 206 + Ieee_1164_Vector_Ror = 207 + Ieee_1164_Condition_Operator = 208 + Ieee_Numeric_Std_Toint_Uns_Nat = 209 + Ieee_Numeric_Std_Toint_Sgn_Int = 210 + Ieee_Numeric_Std_Touns_Nat_Nat_Uns = 211 + Ieee_Numeric_Std_Touns_Nat_Uns_Uns = 212 + Ieee_Numeric_Std_Tosgn_Int_Nat_Sgn = 213 + Ieee_Numeric_Std_Tosgn_Int_Sgn_Sgn = 214 + Ieee_Numeric_Std_Resize_Uns_Nat = 215 + Ieee_Numeric_Std_Resize_Sgn_Nat = 216 + Ieee_Numeric_Std_Resize_Uns_Uns = 217 + Ieee_Numeric_Std_Resize_Sgn_Sgn = 218 + Ieee_Numeric_Std_Add_Uns_Uns = 219 + Ieee_Numeric_Std_Add_Uns_Nat = 220 + Ieee_Numeric_Std_Add_Nat_Uns = 221 + Ieee_Numeric_Std_Add_Uns_Log = 222 + Ieee_Numeric_Std_Add_Log_Uns = 223 + Ieee_Numeric_Std_Add_Sgn_Sgn = 224 + Ieee_Numeric_Std_Add_Sgn_Int = 225 + Ieee_Numeric_Std_Add_Int_Sgn = 226 + Ieee_Numeric_Std_Add_Sgn_Log = 227 + Ieee_Numeric_Std_Add_Log_Sgn = 228 + Ieee_Numeric_Std_Sub_Uns_Uns = 229 + Ieee_Numeric_Std_Sub_Uns_Nat = 230 + Ieee_Numeric_Std_Sub_Nat_Uns = 231 + Ieee_Numeric_Std_Sub_Uns_Log = 232 + Ieee_Numeric_Std_Sub_Log_Uns = 233 + Ieee_Numeric_Std_Sub_Sgn_Sgn = 234 + Ieee_Numeric_Std_Sub_Sgn_Int = 235 + Ieee_Numeric_Std_Sub_Int_Sgn = 236 + Ieee_Numeric_Std_Sub_Sgn_Log = 237 + Ieee_Numeric_Std_Sub_Log_Sgn = 238 + Ieee_Numeric_Std_Mul_Uns_Uns = 239 + Ieee_Numeric_Std_Mul_Uns_Nat = 240 + Ieee_Numeric_Std_Mul_Nat_Uns = 241 + Ieee_Numeric_Std_Mul_Sgn_Sgn = 242 + Ieee_Numeric_Std_Mul_Sgn_Int = 243 + Ieee_Numeric_Std_Mul_Int_Sgn = 244 + Ieee_Numeric_Std_Div_Uns_Uns = 245 + Ieee_Numeric_Std_Div_Uns_Nat = 246 + Ieee_Numeric_Std_Div_Nat_Uns = 247 + Ieee_Numeric_Std_Div_Sgn_Sgn = 248 + Ieee_Numeric_Std_Div_Sgn_Int = 249 + Ieee_Numeric_Std_Div_Int_Sgn = 250 + Ieee_Numeric_Std_Gt_Uns_Uns = 251 + Ieee_Numeric_Std_Gt_Uns_Nat = 252 + Ieee_Numeric_Std_Gt_Nat_Uns = 253 + Ieee_Numeric_Std_Gt_Sgn_Sgn = 254 + Ieee_Numeric_Std_Gt_Sgn_Int = 255 + Ieee_Numeric_Std_Gt_Int_Sgn = 256 + Ieee_Numeric_Std_Lt_Uns_Uns = 257 + Ieee_Numeric_Std_Lt_Uns_Nat = 258 + Ieee_Numeric_Std_Lt_Nat_Uns = 259 + Ieee_Numeric_Std_Lt_Sgn_Sgn = 260 + Ieee_Numeric_Std_Lt_Sgn_Int = 261 + Ieee_Numeric_Std_Lt_Int_Sgn = 262 + Ieee_Numeric_Std_Le_Uns_Uns = 263 + Ieee_Numeric_Std_Le_Uns_Nat = 264 + Ieee_Numeric_Std_Le_Nat_Uns = 265 + Ieee_Numeric_Std_Le_Sgn_Sgn = 266 + Ieee_Numeric_Std_Le_Sgn_Int = 267 + Ieee_Numeric_Std_Le_Int_Sgn = 268 + Ieee_Numeric_Std_Ge_Uns_Uns = 269 + Ieee_Numeric_Std_Ge_Uns_Nat = 270 + Ieee_Numeric_Std_Ge_Nat_Uns = 271 + Ieee_Numeric_Std_Ge_Sgn_Sgn = 272 + Ieee_Numeric_Std_Ge_Sgn_Int = 273 + Ieee_Numeric_Std_Ge_Int_Sgn = 274 + Ieee_Numeric_Std_Eq_Uns_Uns = 275 + Ieee_Numeric_Std_Eq_Uns_Nat = 276 + Ieee_Numeric_Std_Eq_Nat_Uns = 277 + Ieee_Numeric_Std_Eq_Sgn_Sgn = 278 + Ieee_Numeric_Std_Eq_Sgn_Int = 279 + Ieee_Numeric_Std_Eq_Int_Sgn = 280 + Ieee_Numeric_Std_Ne_Uns_Uns = 281 + Ieee_Numeric_Std_Ne_Uns_Nat = 282 + Ieee_Numeric_Std_Ne_Nat_Uns = 283 + Ieee_Numeric_Std_Ne_Sgn_Sgn = 284 + Ieee_Numeric_Std_Ne_Sgn_Int = 285 + Ieee_Numeric_Std_Ne_Int_Sgn = 286 + Ieee_Numeric_Std_Match_Gt_Uns_Uns = 287 + Ieee_Numeric_Std_Match_Gt_Uns_Nat = 288 + Ieee_Numeric_Std_Match_Gt_Nat_Uns = 289 + Ieee_Numeric_Std_Match_Gt_Sgn_Sgn = 290 + Ieee_Numeric_Std_Match_Gt_Sgn_Int = 291 + Ieee_Numeric_Std_Match_Gt_Int_Sgn = 292 + Ieee_Numeric_Std_Match_Lt_Uns_Uns = 293 + Ieee_Numeric_Std_Match_Lt_Uns_Nat = 294 + Ieee_Numeric_Std_Match_Lt_Nat_Uns = 295 + Ieee_Numeric_Std_Match_Lt_Sgn_Sgn = 296 + Ieee_Numeric_Std_Match_Lt_Sgn_Int = 297 + Ieee_Numeric_Std_Match_Lt_Int_Sgn = 298 + Ieee_Numeric_Std_Match_Le_Uns_Uns = 299 + Ieee_Numeric_Std_Match_Le_Uns_Nat = 300 + Ieee_Numeric_Std_Match_Le_Nat_Uns = 301 + Ieee_Numeric_Std_Match_Le_Sgn_Sgn = 302 + Ieee_Numeric_Std_Match_Le_Sgn_Int = 303 + Ieee_Numeric_Std_Match_Le_Int_Sgn = 304 + Ieee_Numeric_Std_Match_Ge_Uns_Uns = 305 + Ieee_Numeric_Std_Match_Ge_Uns_Nat = 306 + Ieee_Numeric_Std_Match_Ge_Nat_Uns = 307 + Ieee_Numeric_Std_Match_Ge_Sgn_Sgn = 308 + Ieee_Numeric_Std_Match_Ge_Sgn_Int = 309 + Ieee_Numeric_Std_Match_Ge_Int_Sgn = 310 + Ieee_Numeric_Std_Match_Eq_Uns_Uns = 311 + Ieee_Numeric_Std_Match_Eq_Uns_Nat = 312 + Ieee_Numeric_Std_Match_Eq_Nat_Uns = 313 + Ieee_Numeric_Std_Match_Eq_Sgn_Sgn = 314 + Ieee_Numeric_Std_Match_Eq_Sgn_Int = 315 + Ieee_Numeric_Std_Match_Eq_Int_Sgn = 316 + Ieee_Numeric_Std_Match_Ne_Uns_Uns = 317 + Ieee_Numeric_Std_Match_Ne_Uns_Nat = 318 + Ieee_Numeric_Std_Match_Ne_Nat_Uns = 319 + Ieee_Numeric_Std_Match_Ne_Sgn_Sgn = 320 + Ieee_Numeric_Std_Match_Ne_Sgn_Int = 321 + Ieee_Numeric_Std_Match_Ne_Int_Sgn = 322 + Ieee_Numeric_Std_Shl_Uns_Nat = 323 + Ieee_Numeric_Std_Shr_Uns_Nat = 324 + Ieee_Numeric_Std_Shl_Sgn_Nat = 325 + Ieee_Numeric_Std_Shr_Sgn_Nat = 326 + Ieee_Numeric_Std_Sll_Uns_Int = 327 + Ieee_Numeric_Std_Sll_Sgn_Int = 328 + Ieee_Numeric_Std_Srl_Uns_Int = 329 + Ieee_Numeric_Std_Srl_Sgn_Int = 330 + Ieee_Numeric_Std_Sla_Uns_Int = 331 + Ieee_Numeric_Std_Sla_Sgn_Int = 332 + Ieee_Numeric_Std_Sra_Uns_Int = 333 + Ieee_Numeric_Std_Sra_Sgn_Int = 334 + Ieee_Numeric_Std_Rol_Uns_Nat = 335 + Ieee_Numeric_Std_Ror_Uns_Nat = 336 + Ieee_Numeric_Std_Rol_Sgn_Nat = 337 + Ieee_Numeric_Std_Ror_Sgn_Nat = 338 + Ieee_Numeric_Std_Not_Uns = 339 + Ieee_Numeric_Std_Not_Sgn = 340 + Ieee_Numeric_Std_Abs_Sgn = 341 + Ieee_Numeric_Std_And_Uns_Uns = 342 + Ieee_Numeric_Std_And_Sgn_Sgn = 343 + Ieee_Numeric_Std_Or_Uns_Uns = 344 + Ieee_Numeric_Std_Or_Sgn_Sgn = 345 + Ieee_Numeric_Std_Nand_Uns_Uns = 346 + Ieee_Numeric_Std_Nand_Sgn_Sgn = 347 + Ieee_Numeric_Std_Nor_Uns_Uns = 348 + Ieee_Numeric_Std_Nor_Sgn_Sgn = 349 + Ieee_Numeric_Std_Xor_Uns_Uns = 350 + Ieee_Numeric_Std_Xor_Sgn_Sgn = 351 + Ieee_Numeric_Std_Xnor_Uns_Uns = 352 + Ieee_Numeric_Std_Xnor_Sgn_Sgn = 353 + Ieee_Numeric_Std_Neg_Uns = 354 + Ieee_Numeric_Std_Neg_Sgn = 355 + Ieee_Numeric_Std_Match_Log = 356 + Ieee_Numeric_Std_Match_Uns = 357 + Ieee_Numeric_Std_Match_Sgn = 358 + Ieee_Numeric_Std_Match_Slv = 359 + Ieee_Numeric_Std_Match_Suv = 360 + Ieee_Math_Real_Ceil = 361 + Ieee_Math_Real_Round = 362 + Ieee_Math_Real_Log2 = 363 + Ieee_Math_Real_Sin = 364 + Ieee_Math_Real_Cos = 365 + Ieee_Std_Logic_Unsigned_Add_Slv_Slv = 366 + Ieee_Std_Logic_Unsigned_Add_Slv_Int = 367 + Ieee_Std_Logic_Unsigned_Add_Int_Slv = 368 + Ieee_Std_Logic_Unsigned_Add_Slv_Sl = 369 + Ieee_Std_Logic_Unsigned_Add_Sl_Slv = 370 + Ieee_Std_Logic_Unsigned_Sub_Slv_Slv = 371 + Ieee_Std_Logic_Unsigned_Sub_Slv_Int = 372 + Ieee_Std_Logic_Unsigned_Sub_Int_Slv = 373 + Ieee_Std_Logic_Unsigned_Sub_Slv_Sl = 374 + Ieee_Std_Logic_Unsigned_Sub_Sl_Slv = 375 + Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 376 + Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 377 + Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 378 + Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 379 + Ieee_Std_Logic_Unsigned_Le_Slv_Int = 380 + Ieee_Std_Logic_Unsigned_Le_Int_Slv = 381 + Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 382 + Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 383 + Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 384 + Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 385 + Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 386 + Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 387 + Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 388 + Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 389 + Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 390 + Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 391 + Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 392 + Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 393 + Ieee_Std_Logic_Unsigned_Conv_Integer = 394 + Ieee_Std_Logic_Signed_Add_Slv_Slv = 395 + Ieee_Std_Logic_Signed_Add_Slv_Int = 396 + Ieee_Std_Logic_Signed_Add_Int_Slv = 397 + Ieee_Std_Logic_Signed_Add_Slv_Sl = 398 + Ieee_Std_Logic_Signed_Add_Sl_Slv = 399 + Ieee_Std_Logic_Signed_Sub_Slv_Slv = 400 + Ieee_Std_Logic_Signed_Sub_Slv_Int = 401 + Ieee_Std_Logic_Signed_Sub_Int_Slv = 402 + Ieee_Std_Logic_Signed_Sub_Slv_Sl = 403 + Ieee_Std_Logic_Signed_Sub_Sl_Slv = 404 + Ieee_Std_Logic_Arith_Conv_Unsigned_Int = 405 + Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 406 + Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 407 + Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 408 + Ieee_Std_Logic_Arith_Conv_Integer_Int = 409 + Ieee_Std_Logic_Arith_Conv_Integer_Uns = 410 + Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 411 + Ieee_Std_Logic_Arith_Conv_Integer_Log = 412 Get_Kind = libghdl.vhdl__nodes__get_kind Get_Location = libghdl.vhdl__nodes__get_location diff --git a/src/std_names.adb b/src/std_names.adb index d8d71b29b..aaad7ab51 100644 --- a/src/std_names.adb +++ b/src/std_names.adb @@ -643,7 +643,11 @@ package body Std_Names is Def ("shift_right", Name_Shift_Right); Def ("rotate_left", Name_Rotate_Left); Def ("rotate_right", Name_Rotate_Right); + Def ("to_bit", Name_To_Bit); Def ("to_bitvector", Name_To_Bitvector); + Def ("to_stdulogic", Name_To_Stdulogic); + Def ("to_stdlogicvector", Name_To_Stdlogicvector); + Def ("to_stdulogicvector", Name_To_Stdulogicvector); Def ("is_x", Name_Is_X); Def ("conv_signed", Name_Conv_Signed); Def ("conv_unsigned", Name_Conv_Unsigned); diff --git a/src/std_names.ads b/src/std_names.ads index efb0ba919..eb24904a6 100644 --- a/src/std_names.ads +++ b/src/std_names.ads @@ -724,17 +724,21 @@ package Std_Names is Name_Shift_Right : constant Name_Id := Name_First_Ieee + 025; Name_Rotate_Left : constant Name_Id := Name_First_Ieee + 026; Name_Rotate_Right : constant Name_Id := Name_First_Ieee + 027; - Name_To_Bitvector : constant Name_Id := Name_First_Ieee + 028; - Name_Is_X : constant Name_Id := Name_First_Ieee + 029; - Name_Conv_Signed : constant Name_Id := Name_First_Ieee + 030; - Name_Conv_Unsigned : constant Name_Id := Name_First_Ieee + 031; - Name_Conv_Integer : constant Name_Id := Name_First_Ieee + 032; - Name_Math_Real : constant Name_Id := Name_First_Ieee + 033; - Name_Ceil : constant Name_Id := Name_First_Ieee + 034; - Name_Round : constant Name_Id := Name_First_Ieee + 035; - Name_Log2 : constant Name_Id := Name_First_Ieee + 036; - Name_Sin : constant Name_Id := Name_First_Ieee + 037; - Name_Cos : constant Name_Id := Name_First_Ieee + 038; + Name_To_Bit : constant Name_Id := Name_First_Ieee + 028; + Name_To_Bitvector : constant Name_Id := Name_First_Ieee + 029; + Name_To_Stdulogic : constant Name_Id := Name_First_Ieee + 030; + Name_To_Stdlogicvector : constant Name_Id := Name_First_Ieee + 031; + Name_To_Stdulogicvector : constant Name_Id := Name_First_Ieee + 032; + Name_Is_X : constant Name_Id := Name_First_Ieee + 033; + Name_Conv_Signed : constant Name_Id := Name_First_Ieee + 034; + Name_Conv_Unsigned : constant Name_Id := Name_First_Ieee + 035; + Name_Conv_Integer : constant Name_Id := Name_First_Ieee + 036; + Name_Math_Real : constant Name_Id := Name_First_Ieee + 037; + Name_Ceil : constant Name_Id := Name_First_Ieee + 038; + Name_Round : constant Name_Id := Name_First_Ieee + 039; + Name_Log2 : constant Name_Id := Name_First_Ieee + 040; + Name_Sin : constant Name_Id := Name_First_Ieee + 041; + Name_Cos : constant Name_Id := Name_First_Ieee + 042; Name_Last_Ieee : constant Name_Id := Name_Cos; Name_First_Synthesis : constant Name_Id := Name_Last_Ieee + 1; diff --git a/src/synth/synth-oper.adb b/src/synth/synth-oper.adb index ec32aa1f0..a185eef17 100644 --- a/src/synth/synth-oper.adb +++ b/src/synth/synth-oper.adb @@ -1270,7 +1270,8 @@ package body Synth.Oper is end if; return Create_Value_Net (Get_Net (L), Create_Res_Bound (L)); end; - when Iir_Predefined_Ieee_1164_To_Stdlogicvector => + when Iir_Predefined_Ieee_1164_To_Stdlogicvector_Suv + | Iir_Predefined_Ieee_1164_To_Stdlogicvector_Bv => declare L : constant Value_Acc := Get_Value (Subprg_Inst, Param1); begin diff --git a/src/vhdl/vhdl-ieee-std_logic_1164.adb b/src/vhdl/vhdl-ieee-std_logic_1164.adb index be78f6afc..6947cb612 100644 --- a/src/vhdl/vhdl-ieee-std_logic_1164.adb +++ b/src/vhdl/vhdl-ieee-std_logic_1164.adb @@ -35,6 +35,13 @@ package body Vhdl.Ieee.Std_Logic_1164 is or Base_Type = Std_Logic_Vector_Type; end Is_Vector_Parameter; + function Is_Bitvec_Parameter (Inter : Iir) return Boolean + is + Base_Type : constant Iir := Get_Base_Type (Get_Type (Inter)); + begin + return Base_Type = Std_Package.Bit_Vector_Type_Definition; + end Is_Bitvec_Parameter; + function Is_Integer_Parameter (Inter : Iir) return Boolean is begin return (Get_Base_Type (Get_Type (Inter)) @@ -147,6 +154,24 @@ package body Vhdl.Ieee.Std_Logic_1164 is return True; end Is_Vector_Function; + -- Return True iff the profile of FUNC is: (l : bit_vector) + function Is_Bitvec_Function (Func : Iir) return Boolean + is + Inter : constant Iir := Get_Interface_Declaration_Chain (Func); + begin + if Get_Implicit_Definition (Func) /= Iir_Predefined_None then + return False; + end if; + if Inter = Null_Iir or else not Is_Bitvec_Parameter (Inter) then + return False; + end if; + if Get_Chain (Inter) /= Null_Iir then + return False; + end if; + + return True; + end Is_Bitvec_Function; + procedure Extract_Declarations (Pkg : Iir_Package_Declaration) is Error : exception; @@ -277,6 +302,24 @@ package body Vhdl.Ieee.Std_Logic_1164 is (Get_Interface_Declaration_Chain (Decl), False); when Name_To_Bitvector => Predefined := Iir_Predefined_Ieee_1164_To_Bitvector; + when Name_To_Stdulogic => + Predefined := Iir_Predefined_Ieee_1164_To_Stdulogic; + when Name_To_Stdlogicvector => + if Is_Vector_Function (Decl) then + Predefined := + Iir_Predefined_Ieee_1164_To_Stdlogicvector_Suv; + elsif Is_Bitvec_Function (Decl) then + Predefined := + Iir_Predefined_Ieee_1164_To_Stdlogicvector_Bv; + end if; + when Name_To_Stdulogicvector => + if Is_Vector_Function (Decl) then + Predefined := + Iir_Predefined_Ieee_1164_To_Stdulogicvector_Slv; + elsif Is_Bitvec_Function (Decl) then + Predefined := + Iir_Predefined_Ieee_1164_To_Stdulogicvector_Bv; + end if; when others => if Is_Scalar_Scalar_Function (Decl) then case Get_Identifier (Decl) is diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 44618964c..104cf529a 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5444,7 +5444,13 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_1164_Vector_Xnor, Iir_Predefined_Ieee_1164_Vector_Not, + Iir_Predefined_Ieee_1164_To_Bit, Iir_Predefined_Ieee_1164_To_Bitvector, + Iir_Predefined_Ieee_1164_To_Stdulogic, + Iir_Predefined_Ieee_1164_To_Stdlogicvector_Bv, + Iir_Predefined_Ieee_1164_To_Stdlogicvector_Suv, + Iir_Predefined_Ieee_1164_To_Stdulogicvector_Bv, + Iir_Predefined_Ieee_1164_To_Stdulogicvector_Slv, Iir_Predefined_Ieee_1164_Vector_Is_X, Iir_Predefined_Ieee_1164_Scalar_Is_X, |