diff options
| -rw-r--r-- | testsuite/gna/issue679/repro.vhdl | 14 | ||||
| -rwxr-xr-x | testsuite/gna/issue679/testsuite.sh | 9 |
2 files changed, 23 insertions, 0 deletions
diff --git a/testsuite/gna/issue679/repro.vhdl b/testsuite/gna/issue679/repro.vhdl new file mode 100644 index 000000000..2aa5e63df --- /dev/null +++ b/testsuite/gna/issue679/repro.vhdl @@ -0,0 +1,14 @@ +entity repro is +end repro; + +architecture behav of repro is + signal clk : bit; + signal cyc: bit; + signal wen : bit; + signal lw : bit; +begin + -- psl default clock is clk; + + -- psl c1: assert always lw -> cyc and (next not(wen)) + -- report "error"; +end; diff --git a/testsuite/gna/issue679/testsuite.sh b/testsuite/gna/issue679/testsuite.sh new file mode 100755 index 000000000..d44aa19d3 --- /dev/null +++ b/testsuite/gna/issue679/testsuite.sh @@ -0,0 +1,9 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze -fpsl repro.vhdl + +clean + +echo "Test successful" |