diff options
| -rw-r--r-- | src/synth/elab-vhdl_types.adb | 8 | ||||
| -rw-r--r-- | src/vhdl/vhdl-annotations.adb | 2 |
2 files changed, 9 insertions, 1 deletions
diff --git a/src/synth/elab-vhdl_types.adb b/src/synth/elab-vhdl_types.adb index 33b5feb8c..8aeb33d37 100644 --- a/src/synth/elab-vhdl_types.adb +++ b/src/synth/elab-vhdl_types.adb @@ -617,6 +617,14 @@ package body Elab.Vhdl_Types is (Syn_Inst, Get_Range_Constraint (Atype)); return Create_Float_Type (Rng); end; + when Iir_Kind_Access_Subtype_Definition => + declare + Acc_Typ : Type_Acc; + begin + Acc_Typ := Synth_Subtype_Indication + (Syn_Inst, Get_Designated_Type (Atype)); + return Create_Access_Type (Acc_Typ); + end; when others => Vhdl.Errors.Error_Kind ("synth_subtype_indication", Atype); end case; diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb index 77cc58434..1bb0bff82 100644 --- a/src/vhdl/vhdl-annotations.adb +++ b/src/vhdl/vhdl-annotations.adb @@ -401,7 +401,7 @@ package body Vhdl.Annotations is end if; when Iir_Kind_Access_Subtype_Definition => - null; + Create_Object_Info (Block_Info, Def, Kind_Type); when Iir_Kind_File_Type_Definition => if Flag_Synthesis then |