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-rw-r--r--src/synth/elab-vhdl_expr.adb28
-rw-r--r--src/synth/elab-vhdl_objtypes.adb30
-rw-r--r--src/synth/elab-vhdl_objtypes.ads18
-rw-r--r--src/synth/elab-vhdl_types.adb3
-rw-r--r--src/synth/synth-vhdl_aggr.adb2
-rw-r--r--src/synth/synth-vhdl_eval.adb6
-rw-r--r--src/synth/synth-vhdl_expr.adb5
-rw-r--r--src/synth/synth-vhdl_oper.adb6
-rw-r--r--src/synth/synth-vhdl_stmts.adb8
9 files changed, 36 insertions, 70 deletions
diff --git a/src/synth/elab-vhdl_expr.adb b/src/synth/elab-vhdl_expr.adb
index 0ddc874cf..61d47cdfc 100644
--- a/src/synth/elab-vhdl_expr.adb
+++ b/src/synth/elab-vhdl_expr.adb
@@ -25,7 +25,6 @@ with Errorout; use Errorout;
with Vhdl.Errors; use Vhdl.Errors;
with Vhdl.Utils; use Vhdl.Utils;
with Vhdl.Evaluation; use Vhdl.Evaluation;
-with Vhdl.Annotations; use Vhdl.Annotations;
with Elab.Memtype; use Elab.Memtype;
with Elab.Vhdl_Heap; use Elab.Vhdl_Heap;
@@ -42,29 +41,6 @@ with Grt.Types;
with Grt.To_Strings;
package body Elab.Vhdl_Expr is
- function Synth_Array_Bounds (Syn_Inst : Synth_Instance_Acc;
- Atype : Node;
- Dim : Dim_Type) return Bound_Type
- is
- Info : constant Sim_Info_Acc := Get_Info (Atype);
- begin
- if Info = null then
- pragma Assert (Get_Type_Declarator (Atype) = Null_Node);
- declare
- Index_Type : constant Node :=
- Get_Index_Type (Atype, Natural (Dim - 1));
- begin
- return Synth_Bounds_From_Range (Syn_Inst, Index_Type);
- end;
- else
- declare
- Bnds : constant Type_Acc := Get_Subtype_Object (Syn_Inst, Atype);
- begin
- return Get_Array_Bound (Bnds, Dim);
- end;
- end if;
- end Synth_Array_Bounds;
-
function Synth_Bounds_From_Length (Atype : Node; Len : Int32)
return Bound_Type
is
@@ -467,7 +443,7 @@ package body Elab.Vhdl_Expr is
Res := Create_Vector_Type (Bnd, Btyp.Arr_El);
when Type_Unbounded_Vector =>
pragma Assert (El_Typ.Kind in Type_Nets);
- Res := Create_Vector_Type (Bnd, Btyp.Uvec_El);
+ Res := Create_Vector_Type (Bnd, Btyp.Uarr_El);
when Type_Array =>
pragma Assert (Btyp.Alast);
pragma Assert (Is_Bounded_Type (Btyp.Arr_El));
@@ -511,7 +487,7 @@ package body Elab.Vhdl_Expr is
Strip_Const (Idx_Val);
- Bnd := Get_Array_Bound (Pfx_Type, Dim_Type (I + 1));
+ Bnd := Get_Array_Bound (Pfx_Type);
pragma Assert (Is_Static (Idx_Val.Val));
diff --git a/src/synth/elab-vhdl_objtypes.adb b/src/synth/elab-vhdl_objtypes.adb
index 13f28abe0..ea21eab11 100644
--- a/src/synth/elab-vhdl_objtypes.adb
+++ b/src/synth/elab-vhdl_objtypes.adb
@@ -83,14 +83,13 @@ package body Elab.Vhdl_Objtypes is
return False;
end if;
return Are_Types_Equal (L.Arr_El, R.Arr_El);
- when Type_Unbounded_Array =>
+ when Type_Unbounded_Array
+ | Type_Unbounded_Vector =>
if L.Ulast /= R.Ulast then
return False;
end if;
-- Also check index ?
return Are_Types_Equal (L.Uarr_El, R.Uarr_El);
- when Type_Unbounded_Vector =>
- return Are_Types_Equal (L.Uvec_El, R.Uvec_El);
when Type_Slice =>
return Are_Types_Equal (L.Slice_El, R.Slice_El);
when Type_Record
@@ -373,8 +372,9 @@ package body Elab.Vhdl_Objtypes is
Al => El_Type.Al,
Sz => 0,
W => 0,
- Uvec_El => El_Type,
- Uvec_Idx1 => Idx)));
+ Ulast => True,
+ Uarr_El => El_Type,
+ Uarr_Idx => Idx)));
end Create_Unbounded_Vector;
function Get_Array_Element (Arr_Type : Type_Acc) return Type_Acc is
@@ -383,41 +383,35 @@ package body Elab.Vhdl_Objtypes is
when Type_Vector
| Type_Array =>
return Arr_Type.Arr_El;
- when Type_Unbounded_Array =>
+ when Type_Unbounded_Array
+ | Type_Unbounded_Vector =>
return Arr_Type.Uarr_El;
- when Type_Unbounded_Vector =>
- return Arr_Type.Uvec_El;
when others =>
raise Internal_Error;
end case;
end Get_Array_Element;
- function Get_Array_Bound (Typ : Type_Acc; Dim : Dim_Type)
- return Bound_Type is
+ function Get_Array_Bound (Typ : Type_Acc) return Bound_Type is
begin
case Typ.Kind is
when Type_Vector
| Type_Array =>
- if Dim /= 1 then
- raise Internal_Error;
- end if;
return Typ.Abound;
when others =>
raise Internal_Error;
end case;
end Get_Array_Bound;
- function Get_Uarray_First_Index (Typ : Type_Acc) return Type_Acc is
+ function Get_Uarray_Index (Typ : Type_Acc) return Type_Acc is
begin
case Typ.Kind is
- when Type_Unbounded_Vector =>
- return Typ.Uvec_Idx1;
- when Type_Unbounded_Array =>
+ when Type_Unbounded_Vector
+ | Type_Unbounded_Array =>
return Typ.Uarr_Idx;
when others =>
raise Internal_Error;
end case;
- end Get_Uarray_First_Index;
+ end Get_Uarray_Index;
function Get_Range_Length (Rng : Discrete_Range_Type) return Uns32
is
diff --git a/src/synth/elab-vhdl_objtypes.ads b/src/synth/elab-vhdl_objtypes.ads
index 93376d652..57a7ad82e 100644
--- a/src/synth/elab-vhdl_objtypes.ads
+++ b/src/synth/elab-vhdl_objtypes.ads
@@ -139,14 +139,10 @@ package Elab.Vhdl_Objtypes is
Abound : Bound_Type;
Alast : Boolean; -- True for the last dimension
Arr_El : Type_Acc;
- when Type_Unbounded_Vector =>
- Uvec_El : Type_Acc;
- Uvec_Idx1 : Type_Acc;
- when Type_Unbounded_Array =>
+ when Type_Unbounded_Array
+ | Type_Unbounded_Vector =>
Uarr_El : Type_Acc;
Ulast : Boolean;
- -- Type of the first index. The only place we need the index is
- -- for concatenation.
Uarr_Idx : Type_Acc;
when Type_Record
| Type_Unbounded_Record =>
@@ -220,16 +216,14 @@ package Elab.Vhdl_Objtypes is
function In_Bounds (Bnd : Bound_Type; V : Int32) return Boolean;
function In_Range (Rng : Discrete_Range_Type; V : Int64) return Boolean;
- -- Return the first index of an unbounded array or vector.
- function Get_Uarray_First_Index (Typ : Type_Acc) return Type_Acc;
+ -- Index type of unbounded array or unbounded vector.
+ function Get_Uarray_Index (Typ : Type_Acc) return Type_Acc;
-- Return True iff ARR is the last dimension of a multidimensional array.
function Is_Last_Dimension (Arr : Type_Acc) return Boolean;
- -- Return the bounds of dimension DIM of a vector/array. For a vector,
- -- DIM must be 1.
- function Get_Array_Bound (Typ : Type_Acc; Dim : Dim_Type)
- return Bound_Type;
+ -- Return the bounds of a vector/array.
+ function Get_Array_Bound (Typ : Type_Acc) return Bound_Type;
-- Return the length of RNG.
function Get_Range_Length (Rng : Discrete_Range_Type) return Uns32;
diff --git a/src/synth/elab-vhdl_types.adb b/src/synth/elab-vhdl_types.adb
index 527c825e2..ad43277fb 100644
--- a/src/synth/elab-vhdl_types.adb
+++ b/src/synth/elab-vhdl_types.adb
@@ -85,7 +85,8 @@ package body Elab.Vhdl_Types is
Typ := Exec_Name_Subtype (Syn_Inst, Prefix_Name);
end if;
- return Get_Array_Bound (Typ, Dim_Type (Dim));
+ pragma Assert (Dim = 1);
+ return Get_Array_Bound (Typ);
end Synth_Array_Attribute;
procedure Synth_Discrete_Range (Syn_Inst : Synth_Instance_Acc;
diff --git a/src/synth/synth-vhdl_aggr.adb b/src/synth/synth-vhdl_aggr.adb
index 0694a99b0..380d8d391 100644
--- a/src/synth/synth-vhdl_aggr.adb
+++ b/src/synth/synth-vhdl_aggr.adb
@@ -122,7 +122,7 @@ package body Synth.Vhdl_Aggr is
Err_P : out boolean)
is
Ctxt : constant Context_Acc := Get_Build (Syn_Inst);
- Bound : constant Bound_Type := Get_Array_Bound (Typ, 1);
+ Bound : constant Bound_Type := Get_Array_Bound (Typ);
El_Typ : constant Type_Acc := Get_Array_Element (Typ);
Stride : constant Nat32 := Strides (Dim);
Value : Node;
diff --git a/src/synth/synth-vhdl_eval.adb b/src/synth/synth-vhdl_eval.adb
index 7b1bd91d9..590ab9900 100644
--- a/src/synth/synth-vhdl_eval.adb
+++ b/src/synth/synth-vhdl_eval.adb
@@ -344,7 +344,7 @@ package body Synth.Vhdl_Eval is
begin
Check_Matching_Bounds (Le_Typ, Re_Typ, Expr);
Bnd := Elab.Vhdl_Types.Create_Bounds_From_Length
- (Get_Uarray_First_Index (Res_Typ).Drange, L_Len + R_Len);
+ (Get_Uarray_Index (Res_Typ).Drange, L_Len + R_Len);
Res_St := Create_Onedimensional_Array_Subtype
(Res_Typ, Bnd, Le_Typ);
Res := Create_Memory (Res_St);
@@ -367,7 +367,7 @@ package body Synth.Vhdl_Eval is
begin
Check_Matching_Bounds (Left.Typ, Re_Typ, Expr);
Bnd := Elab.Vhdl_Types.Create_Bounds_From_Length
- (Get_Uarray_First_Index (Res_Typ).Drange, 1 + Rlen);
+ (Get_Uarray_Index (Res_Typ).Drange, 1 + Rlen);
Res_St := Create_Onedimensional_Array_Subtype
(Res_Typ, Bnd, Re_Typ);
Res := Create_Memory (Res_St);
@@ -387,7 +387,7 @@ package body Synth.Vhdl_Eval is
begin
Check_Matching_Bounds (Le_Typ, Right.Typ, Expr);
Bnd := Elab.Vhdl_Types.Create_Bounds_From_Length
- (Get_Uarray_First_Index (Res_Typ).Drange, Llen + 1);
+ (Get_Uarray_Index (Res_Typ).Drange, Llen + 1);
Res_St := Create_Onedimensional_Array_Subtype
(Res_Typ, Bnd, Le_Typ);
Res := Create_Memory (Res_St);
diff --git a/src/synth/synth-vhdl_expr.adb b/src/synth/synth-vhdl_expr.adb
index f9333b5d6..fe1fb0cbe 100644
--- a/src/synth/synth-vhdl_expr.adb
+++ b/src/synth/synth-vhdl_expr.adb
@@ -490,7 +490,8 @@ package body Synth.Vhdl_Expr is
declare
Bnds : constant Type_Acc := Get_Subtype_Object (Syn_Inst, Atype);
begin
- return Get_Array_Bound (Bnds, Dim);
+ pragma Assert (Dim = 1);
+ return Get_Array_Bound (Bnds);
end;
end if;
end Synth_Array_Bounds;
@@ -826,7 +827,7 @@ package body Synth.Vhdl_Expr is
Strip_Const (Idx_Val);
- Bnd := Get_Array_Bound (Arr_Typ, 1);
+ Bnd := Get_Array_Bound (Arr_Typ);
if Is_Static_Val (Idx_Val.Val) then
Idx := Get_Static_Discrete (Idx_Val);
diff --git a/src/synth/synth-vhdl_oper.adb b/src/synth/synth-vhdl_oper.adb
index fba3b3ad5..9a0415a0e 100644
--- a/src/synth/synth-vhdl_oper.adb
+++ b/src/synth/synth-vhdl_oper.adb
@@ -1958,7 +1958,7 @@ package body Synth.Vhdl_Oper is
return Synth_Conv_Vector (False);
when Iir_Predefined_Ieee_Numeric_Std_Touns_Nat_Uns_Uns =>
declare
- B : constant Bound_Type := Get_Array_Bound (R.Typ, 1);
+ B : constant Bound_Type := Get_Array_Bound (R.Typ);
begin
return Synth_Resize (Ctxt, L, B.Len, False, Expr);
end;
@@ -2002,7 +2002,7 @@ package body Synth.Vhdl_Oper is
B : Bound_Type;
W : Width;
begin
- B := Get_Array_Bound (R.Typ, 1);
+ B := Get_Array_Bound (R.Typ);
W := B.Len;
return Create_Value_Net
(Build2_Uresize (Ctxt, Get_Net (Ctxt, L),
@@ -2021,7 +2021,7 @@ package body Synth.Vhdl_Oper is
(Ctxt, L, Uns32 (Read_Discrete (R)), True, Expr);
when Iir_Predefined_Ieee_Numeric_Std_Resize_Sgn_Sgn =>
declare
- B : constant Bound_Type := Get_Array_Bound (R.Typ, 1);
+ B : constant Bound_Type := Get_Array_Bound (R.Typ);
begin
return Synth_Resize (Ctxt, L, B.Len, True, Expr);
end;
diff --git a/src/synth/synth-vhdl_stmts.adb b/src/synth/synth-vhdl_stmts.adb
index 02405dd25..cf18e1ab2 100644
--- a/src/synth/synth-vhdl_stmts.adb
+++ b/src/synth/synth-vhdl_stmts.adb
@@ -297,7 +297,7 @@ package body Synth.Vhdl_Stmts is
pragma Assert (Get_Kind (Choice) = Iir_Kind_Choice_By_None);
El := Get_Associated_Expr (Choice);
El_Typ := Elab.Vhdl_Expr.Exec_Type_Of_Object (Syn_Inst, El);
- Bnd := Get_Array_Bound (El_Typ, 1);
+ Bnd := Get_Array_Bound (El_Typ);
Len := Len + Bnd.Len;
Choice := Get_Chain (Choice);
end loop;
@@ -325,7 +325,7 @@ package body Synth.Vhdl_Stmts is
-- Compute the type.
case Base_Typ.Kind is
when Type_Unbounded_Vector =>
- Res := Create_Vector_Type (Bnd, Base_Typ.Uvec_El);
+ Res := Create_Vector_Type (Bnd, Base_Typ.Uarr_El);
when others =>
raise Internal_Error;
end case;
@@ -426,7 +426,7 @@ package body Synth.Vhdl_Stmts is
Loc : Node)
is
Ctxt : constant Context_Acc := Get_Build (Inst);
- Targ_Bnd : constant Bound_Type := Get_Array_Bound (Target_Typ, 1);
+ Targ_Bnd : constant Bound_Type := Get_Array_Bound (Target_Typ);
Choice : Node;
Assoc : Node;
Pos : Uns32;
@@ -442,7 +442,7 @@ package body Synth.Vhdl_Stmts is
if Get_Element_Type_Flag (Choice) then
Pos := Pos - 1;
else
- Pos := Pos - Get_Array_Bound (Targ_Info.Targ_Type, 1).Len;
+ Pos := Pos - Get_Array_Bound (Targ_Info.Targ_Type).Len;
end if;
Assign (Inst, Targ_Info,
Aggregate_Extract (Ctxt, Val, Pos,
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-04 15:12:28 +0000