diff options
| -rw-r--r-- | src/psl/psl-prints.adb | 18 | ||||
| -rw-r--r-- | src/vhdl/vhdl-disp_vhdl.adb | 4 |
2 files changed, 18 insertions, 4 deletions
diff --git a/src/psl/psl-prints.adb b/src/psl/psl-prints.adb index 9bc05d940..cdd99c0c3 100644 --- a/src/psl/psl-prints.adb +++ b/src/psl/psl-prints.adb @@ -58,6 +58,8 @@ package body PSL.Prints is return Prio_Seq_Or; when N_And_Prop => return Prio_Seq_And; + when N_Paren_Prop => + return Prio_FL_Paren; when N_Imp_Seq | N_Overlap_Imp_Seq | N_Log_Imp_Prop @@ -372,9 +374,21 @@ package body PSL.Prints is when N_Before => Print_Binary_Property_SI (" before", Prop, Prio); when N_Or_Prop => - Print_Binary_Property (" || ", Prop, Prio); + if True then + Print_Binary_Property (" or ", Prop, Prio); + else + Print_Binary_Property (" || ", Prop, Prio); + end if; when N_And_Prop => - Print_Binary_Property (" && ", Prop, Prio); + if True then + Print_Binary_Property (" and ", Prop, Prio); + else + Print_Binary_Property (" && ", Prop, Prio); + end if; + when N_Paren_Prop => + Put ("("); + Print_Property (Get_Property (Prop), Prio); + Put (")"); when N_Imp_Seq => Print_Property (Get_Sequence (Prop), Prio); Put (" |=> "); diff --git a/src/vhdl/vhdl-disp_vhdl.adb b/src/vhdl/vhdl-disp_vhdl.adb index d8e0ec83e..4a7b007b9 100644 --- a/src/vhdl/vhdl-disp_vhdl.adb +++ b/src/vhdl/vhdl-disp_vhdl.adb @@ -3328,8 +3328,7 @@ package body Vhdl.Disp_Vhdl is Disp_End (Ctxt, Stmt, Tok_Generate); end Disp_For_Generate_Statement; - procedure Disp_If_Generate_Statement - (Ctxt : in out Ctxt_Class; Stmt : Iir) + procedure Disp_If_Generate_Statement (Ctxt : in out Ctxt_Class; Stmt : Iir) is Bod : Iir; Clause : Iir; @@ -3451,6 +3450,7 @@ package body Vhdl.Disp_Vhdl is Put ("--psl "); end if; Disp_Label (Ctxt, Stmt); + Disp_Postponed (Ctxt, Stmt); Disp_Token (Ctxt, Tok_Assert); Disp_Psl_Expression (Ctxt, Get_Psl_Property (Stmt)); Disp_Report_Expression (Ctxt, Stmt); |