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-rw-r--r--doc/using/UART_srcs/vhpi/Zeichnung.svg424
-rw-r--r--doc/using/UART_srcs/vhpi/makefile22
-rw-r--r--doc/using/UART_srcs/vhpi/tb_tty.vhd116
-rw-r--r--doc/using/UART_srcs/vhpi/terminal.pngbin0 -> 18429 bytes
-rw-r--r--doc/using/UART_srcs/vhpi/tty.c83
-rw-r--r--doc/using/UART_srcs/vhpi/tty_pkg.vhd70
-rw-r--r--doc/using/UART_srcs/vhpi/zeichnung.pngbin0 -> 45158 bytes
7 files changed, 715 insertions, 0 deletions
diff --git a/doc/using/UART_srcs/vhpi/Zeichnung.svg b/doc/using/UART_srcs/vhpi/Zeichnung.svg
new file mode 100644
index 000000000..f984c727b
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diff --git a/doc/using/UART_srcs/vhpi/makefile b/doc/using/UART_srcs/vhpi/makefile
new file mode 100644
index 000000000..fdf5bc3b0
--- /dev/null
+++ b/doc/using/UART_srcs/vhpi/makefile
@@ -0,0 +1,22 @@
+
+
+
+all:
+
+ rm -rf work
+ mkdir work
+
+ ghdl -a --work=work --workdir=work tty_pkg.vhd
+ gcc -c -fPIC tty.c -o tty.o
+
+ ghdl -a --work=work --workdir=work ../capitalisation/capitalisation.vhd
+ ghdl -a --work=work --workdir=work tb_tty.vhd
+
+ ghdl -e -Wl,tty.o --ieee=synopsys -fexplicit --workdir=work -Pwork tb_tty
+# ghdl -r tb_tty --wave=tbench.ghw
+ ghdl -r tb_tty --wave=tbench.ghw --stop-time=500000us
+
+
+view:
+ gtkwave tbench.ghw a.gtkw
+
diff --git a/doc/using/UART_srcs/vhpi/tb_tty.vhd b/doc/using/UART_srcs/vhpi/tb_tty.vhd
new file mode 100644
index 000000000..6e1576ed5
--- /dev/null
+++ b/doc/using/UART_srcs/vhpi/tb_tty.vhd
@@ -0,0 +1,116 @@
+--tb_tty.vhd
+LIBRARY ieee;
+USE ieee.std_logic_1164.ALL;
+USE ieee.numeric_std.ALL;
+use work.tty_pkg.all;
+
+ENTITY tb_tty IS
+END tb_tty;
+
+ARCHITECTURE behavior OF tb_tty IS
+
+signal clk : std_logic := '0';
+signal reset : std_logic;
+
+signal data_in : std_logic_vector(7 downto 0);
+signal wdata : std_logic_vector(7 downto 0);
+signal wr_en : std_logic:='1';
+signal wr : std_logic;
+signal rd_en : std_logic;
+signal rd : std_logic;
+signal a : integer;
+signal c : integer;
+
+
+component capitalisation is
+ port(
+ clk : in std_logic;
+ reset : in std_logic;
+ --in
+ rdata : in std_logic_vector(7 downto 0);
+ rd_en : in std_logic;
+ rd : out std_logic;
+ --out
+ wdata : out std_logic_vector(7 downto 0);
+ wr_en : in std_logic;
+ wr : out std_logic
+ );
+end component;
+
+ -- Clock period definitions
+ constant clk_period : time := 10 ns;
+
+subtype by_te is character;
+type f_byte is file of by_te;
+
+BEGIN
+
+--file open
+ process
+ begin c<=tty_open(0);
+ wait;
+ end process;
+
+--read
+process (clk)
+
+variable b: integer;
+begin
+ if rising_edge(CLK) then
+ a<= read_enable(0);
+ if a=1 then
+ data_in<=std_logic_vector(to_unsigned(read_data(0),8));
+ rd_en<='1';
+ else
+ rd_en<='0';
+ end if;
+ end if;
+
+end process;
+
+--write
+process (clk)
+variable b: integer;
+
+ begin
+ if rising_edge(CLK) then
+ if reset='0' then
+ if wr='1' then
+ b:=to_integer(unsigned(wdata));
+ write_data(b);
+ end if;
+ end if;
+ end if;
+ end process;
+
+ stim_proc : process
+ begin
+ reset <= '1';
+
+ wait for 50 ns;
+ reset <='0';
+ wait;
+ end process;
+
+ clk_process :process
+ begin
+ clk <= '0';
+ wait for clk_period/2;
+ clk <= '1';
+ wait for clk_period/2;
+ end process;
+
+engine: capitalisation
+ port map(
+ clk => clk,
+ reset => reset,
+ --in
+ rdata => data_in,
+ rd_en => rd_en,
+ rd => rd,
+ --out
+ wdata => wdata,
+ wr_en => wr_en,
+ wr => wr
+ );
+END;
diff --git a/doc/using/UART_srcs/vhpi/terminal.png b/doc/using/UART_srcs/vhpi/terminal.png
new file mode 100644
index 000000000..a19f3cd64
--- /dev/null
+++ b/doc/using/UART_srcs/vhpi/terminal.png
Binary files differ
diff --git a/doc/using/UART_srcs/vhpi/tty.c b/doc/using/UART_srcs/vhpi/tty.c
new file mode 100644
index 000000000..c04f8f359
--- /dev/null
+++ b/doc/using/UART_srcs/vhpi/tty.c
@@ -0,0 +1,83 @@
+/*
+ VPI code allowing you to connect terminal emulator or other program to pty "connected"
+ to the UART-like port in IP core simulated in GHDL.
+
+ This code is written by Wojciech M. Zabolotny (wz...@ise.pw.edu.pl) on 2nd June 2011
+ and is published as PUBLIC DOMAIN
+
+*/
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdarg.h>
+#include <unistd.h>
+#include <sys/types.h>
+#include <sys/ioctl.h>
+#include <linux/ioctl.h>
+#include <sys/stat.h>
+#include <sys/poll.h>
+#include <fcntl.h>
+#include <errno.h>
+
+char *ptsname(int fd);
+
+int ptyf = -1;
+
+
+
+int tty_open(int a)
+{
+ ptyf = open("/dev/ptmx",O_RDWR);
+ if(ptyf<0) {
+ perror("I can't open pseudoterminal\n");
+ return -1;
+ }
+ if(unlockpt(ptyf)<0) {
+ perror("I can't unlock pseudoterminal\n");
+ return -1;
+ }
+ if(grantpt(ptyf)<0) {
+ perror("I can't grant pseudoterminal\n");
+ return -1;
+ }
+ printf("Pseudoterminal: %s\n",ptsname(ptyf));
+ // sleep(10);
+ return 0;
+}
+
+
+int read_enable(void)
+{
+ //In the masks below you may omit POLLHUP in this case
+ //disconnection of the terminal emulator from pty will not
+ //stop simulation, and you'll be able to reconnect
+ //the same or different program to pty and running simulation
+ struct pollfd pfd[1]={{ptyf,POLLIN | POLLERR | POLLHUP,0}};
+ int res;
+ res=poll(pfd,1,0);
+ if(res==0) return 0;
+ if(res<0) return 0; //error
+ //If you removed POLLHUP from the mask above, you should remove it below too
+ if(pfd[0].revents & (POLLERR|POLLHUP)) return 0; //disconnected or error?
+ if(pfd[0].revents & POLLIN) return 1;
+ return 0;
+}
+
+
+int read_data(void)
+{
+ unsigned char c;
+ read(ptyf,&c,1);
+ return c;
+}
+
+int write_data(int byte)
+{
+ unsigned char c = byte;
+ write(ptyf,&c,1);
+
+ // Debug: printf("Writing %x to pty\n", c);
+ return 0;
+}
+
diff --git a/doc/using/UART_srcs/vhpi/tty_pkg.vhd b/doc/using/UART_srcs/vhpi/tty_pkg.vhd
new file mode 100644
index 000000000..99e3a347f
--- /dev/null
+++ b/doc/using/UART_srcs/vhpi/tty_pkg.vhd
@@ -0,0 +1,70 @@
+--tty_pkg.vhd
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+package tty_pkg is
+
+ function to_integer( s: std_logic) return integer;
+ function to_std_logic( s : integer ) return std_logic;
+
+ function tty_open (portn : integer) return integer;
+ attribute foreign of tty_open :
+ function is "VHPIDIRECT tty_open";
+
+ function read_data ( dummy: integer) return integer;
+ attribute foreign of read_data :
+ function is "VHPIDIRECT read_data";
+
+ function read_enable ( dummy: integer) return integer;
+ attribute foreign of read_enable :
+ function is "VHPIDIRECT read_enable";
+
+ procedure write_data ( data: in integer);
+ attribute foreign of write_data :
+ procedure is "VHPIDIRECT write_data";
+
+end;
+
+
+package body tty_pkg is
+
+ function to_integer( s : std_logic ) return integer is
+ begin
+ if s = '1' then
+ return 1;
+ else
+ return 0;
+ end if;
+ end function;
+
+ function to_std_logic( s : integer ) return std_logic is
+ begin
+ if s > 0 then
+ return '1';
+ else
+ return '0';
+ end if;
+ end function;
+
+
+ function tty_open (portn : integer) return integer is
+ begin
+ assert false report "VHPI" severity failure;
+ end tty_open;
+
+ function read_data (dummy: integer) return integer is
+ begin
+ assert false report "VHPI" severity failure;
+ end read_data;
+
+ function read_enable (dummy: integer) return integer is
+ begin
+ assert false report "VHPI" severity failure;
+ end read_enable;
+
+ procedure write_data ( data: in integer) is
+ begin
+ assert false report "VHPI" severity failure;
+ end write_data;
+end tty_pkg;
diff --git a/doc/using/UART_srcs/vhpi/zeichnung.png b/doc/using/UART_srcs/vhpi/zeichnung.png
new file mode 100644
index 000000000..fbfdec259
--- /dev/null
+++ b/doc/using/UART_srcs/vhpi/zeichnung.png
Binary files differ
generated by cgit v1.2.3 (git 2.25.1) at 2025-05-04 13:33:49 +0000