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-rw-r--r--pyGHDL/dom/_Translate.py7
1 files changed, 2 insertions, 5 deletions
diff --git a/pyGHDL/dom/_Translate.py b/pyGHDL/dom/_Translate.py
index dfc919504..133d9386f 100644
--- a/pyGHDL/dom/_Translate.py
+++ b/pyGHDL/dom/_Translate.py
@@ -41,6 +41,7 @@ from pyGHDL.dom.Sequential import (
SequentialReportStatement,
SequentialAssertStatement,
WaitStatement,
+ SequentialSimpleSignalAssignment,
)
from pyVHDLModel.SyntaxModel import (
Constraint,
@@ -886,11 +887,7 @@ def GetSequentialStatementsFromChainedNodes(
elif kind == nodes.Iir_Kind.Case_Statement:
yield CaseStatement.parse(statement, label)
elif kind == nodes.Iir_Kind.Simple_Signal_Assignment_Statement:
- print(
- "[NOT IMPLEMENTED] (Simple) signal assignment (label: '{label}') at line {line}".format(
- label=label, line=pos.Line
- )
- )
+ yield SequentialSimpleSignalAssignment.parse(statement, label)
elif kind in (
nodes.Iir_Kind.Variable_Assignment_Statement,
nodes.Iir_Kind.Conditional_Variable_Assignment_Statement,