diff options
Diffstat (limited to 'pyGHDL/libghdl/vhdl/nodes.py')
| -rw-r--r-- | pyGHDL/libghdl/vhdl/nodes.py | 30 |
1 files changed, 19 insertions, 11 deletions
diff --git a/pyGHDL/libghdl/vhdl/nodes.py b/pyGHDL/libghdl/vhdl/nodes.py index eba36f86c..619d5c2c4 100644 --- a/pyGHDL/libghdl/vhdl/nodes.py +++ b/pyGHDL/libghdl/vhdl/nodes.py @@ -618,11 +618,6 @@ class Iir_Kinds: Iir_Kind.Procedure_Body, ] - Process_Statement = [ - Iir_Kind.Sensitized_Process_Statement, - Iir_Kind.Process_Statement, - ] - Interface_Object_Declaration = [ Iir_Kind.Interface_Constant_Declaration, Iir_Kind.Interface_Variable_Declaration, @@ -985,6 +980,14 @@ class Iir_Kinds: Iir_Kind.Component_Instantiation_Statement, ] + Structural_Statement = [ + Iir_Kind.Block_Statement, + Iir_Kind.If_Generate_Statement, + Iir_Kind.Case_Generate_Statement, + Iir_Kind.For_Generate_Statement, + Iir_Kind.Component_Instantiation_Statement, + ] + Simple_Concurrent_Statement = [ Iir_Kind.Sensitized_Process_Statement, Iir_Kind.Process_Statement, @@ -1000,6 +1003,17 @@ class Iir_Kinds: Iir_Kind.Psl_Restrict_Directive, ] + Process_Statement = [ + Iir_Kind.Sensitized_Process_Statement, + Iir_Kind.Process_Statement, + ] + + Concurrent_Signal_Assignment = [ + Iir_Kind.Concurrent_Simple_Signal_Assignment, + Iir_Kind.Concurrent_Conditional_Signal_Assignment, + Iir_Kind.Concurrent_Selected_Signal_Assignment, + ] + Psl_Property_Directive = [ Iir_Kind.Psl_Assert_Directive, Iir_Kind.Psl_Assume_Directive, @@ -1023,12 +1037,6 @@ class Iir_Kinds: Iir_Kind.For_Generate_Statement, ] - Concurrent_Signal_Assignment = [ - Iir_Kind.Concurrent_Simple_Signal_Assignment, - Iir_Kind.Concurrent_Conditional_Signal_Assignment, - Iir_Kind.Concurrent_Selected_Signal_Assignment, - ] - If_Case_Generate_Statement = [ Iir_Kind.If_Generate_Statement, Iir_Kind.Case_Generate_Statement, |