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-rw-r--r--src/vhdl/translate/trans-chap12.adb2
-rw-r--r--src/vhdl/vhdl-configuration.adb5
-rw-r--r--src/vhdl/vhdl-configuration.ads3
3 files changed, 6 insertions, 4 deletions
diff --git a/src/vhdl/translate/trans-chap12.adb b/src/vhdl/translate/trans-chap12.adb
index 9fda541a8..f153251f6 100644
--- a/src/vhdl/translate/trans-chap12.adb
+++ b/src/vhdl/translate/trans-chap12.adb
@@ -544,7 +544,7 @@ package body Trans.Chap12 is
(Get_Block_Specification (Get_Block_Configuration (Config_Lib)));
-- Be sure the entity can be at the top of a design.
- Check_Entity_Declaration_Top (Entity);
+ Check_Entity_Declaration_Top (Entity, True);
-- If all design units are loaded, late semantic checks can be
-- performed.
diff --git a/src/vhdl/vhdl-configuration.adb b/src/vhdl/vhdl-configuration.adb
index 573a0b435..25e29b305 100644
--- a/src/vhdl/vhdl-configuration.adb
+++ b/src/vhdl/vhdl-configuration.adb
@@ -685,7 +685,8 @@ package body Vhdl.Configuration is
return Top;
end Configure;
- procedure Check_Entity_Declaration_Top (Entity : Iir_Entity_Declaration)
+ procedure Check_Entity_Declaration_Top
+ (Entity : Iir_Entity_Declaration; Enable_Override : Boolean)
is
Has_Error : Boolean := False;
@@ -747,7 +748,7 @@ package body Vhdl.Configuration is
El := Get_Generic_Chain (Entity);
while El /= Null_Iir loop
if Get_Default_Value (El) = Null_Iir then
- if not Allow_Generic_Override (El) then
+ if not (Enable_Override and Allow_Generic_Override (El)) then
Error (El, "(%n has no default value)", +El);
end if;
end if;
diff --git a/src/vhdl/vhdl-configuration.ads b/src/vhdl/vhdl-configuration.ads
index c6a5105cd..8cadad8fc 100644
--- a/src/vhdl/vhdl-configuration.ads
+++ b/src/vhdl/vhdl-configuration.ads
@@ -51,7 +51,8 @@ package Vhdl.Configuration is
-- ENTITY has no generics or all generics have a default expression
-- ENTITY has no ports or all ports type are constrained.
-- If not, emit a elab error message.
- procedure Check_Entity_Declaration_Top (Entity : Iir_Entity_Declaration);
+ procedure Check_Entity_Declaration_Top
+ (Entity : Iir_Entity_Declaration; Enable_Override : Boolean);
-- Use heuritics to find the top entity in FROM (either a library or
-- a design file): mark all instantiated units and return the unmarked