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-rw-r--r--src/vhdl/translate/trans-chap5.adb10
-rw-r--r--src/vhdl/vhdl-annotations.adb2
-rw-r--r--src/vhdl/vhdl-sem.adb1
-rw-r--r--src/vhdl/vhdl-utils.adb4
4 files changed, 8 insertions, 9 deletions
diff --git a/src/vhdl/translate/trans-chap5.adb b/src/vhdl/translate/trans-chap5.adb
index 3df3a7324..fbc20be0c 100644
--- a/src/vhdl/translate/trans-chap5.adb
+++ b/src/vhdl/translate/trans-chap5.adb
@@ -361,7 +361,7 @@ package body Trans.Chap5 is
Formal_Env : Map_Env;
Actual_Env : Map_Env)
is
- Actual : constant Iir := Get_Actual (Assoc);
+ Actual : constant Iir := Strip_Reference_Name (Get_Actual (Assoc));
Formal_Type : constant Iir := Get_Type (Formal);
Actual_Type : constant Iir := Get_Type (Actual);
Port : constant Iir := Get_Interface_Of_Formal (Formal);
@@ -448,13 +448,7 @@ package body Trans.Chap5 is
-- actual, but the type of the formal may be used by the actual.
Set_Map_Env (Formal_Env);
Chap6.Translate_Signal_Name (Formal, Formal_Sig, Formal_Val);
- if Get_Kind (Actual) = Iir_Kind_Reference_Name then
- -- For vhdl08 association by expression.
- Actual_En := Chap7.Translate_Expression
- (Get_Referenced_Name (Actual), Formal_Type);
- else
- Actual_En := Chap7.Translate_Expression (Actual, Formal_Type);
- end if;
+ Actual_En := Chap7.Translate_Expression (Actual, Formal_Type);
Actual_Sig := E2M (Actual_En, Get_Info (Formal_Type), Mode_Value);
Mode := Connect_Value;
-- raise Internal_Error;
diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb
index 2d02029ce..2feba99f5 100644
--- a/src/vhdl/vhdl-annotations.adb
+++ b/src/vhdl/vhdl-annotations.adb
@@ -679,6 +679,8 @@ package body Vhdl.Annotations is
when Iir_Kind_Signal_Declaration =>
Annotate_Declaration_Type (Block_Info, Decl);
Create_Signal_Info (Block_Info, Decl);
+ when Iir_Kind_Anonymous_Signal_Declaration =>
+ Create_Signal_Info (Block_Info, Decl);
when Iir_Kind_Variable_Declaration
| Iir_Kind_Iterator_Declaration =>
diff --git a/src/vhdl/vhdl-sem.adb b/src/vhdl/vhdl-sem.adb
index 7e6785a2b..6674af1b4 100644
--- a/src/vhdl/vhdl-sem.adb
+++ b/src/vhdl/vhdl-sem.adb
@@ -614,6 +614,7 @@ package body Vhdl.Sem is
-- LRM08 6.5.6.3 Port clauses
Actual := Sem_Insert_Anonymous_Signal (Inter, Actual);
Set_Actual (Assoc, Actual);
+ Set_Collapse_Signal_Flag (Assoc, True);
else
Error_Msg_Sem
(+Actual,
diff --git a/src/vhdl/vhdl-utils.adb b/src/vhdl/vhdl-utils.adb
index 8c550ab98..3d6115662 100644
--- a/src/vhdl/vhdl-utils.adb
+++ b/src/vhdl/vhdl-utils.adb
@@ -364,7 +364,8 @@ package body Vhdl.Utils is
when Iir_Kind_Signal_Declaration
| Iir_Kind_Variable_Declaration
| Iir_Kind_File_Declaration
- | Iir_Kind_Constant_Declaration =>
+ | Iir_Kind_Constant_Declaration
+ | Iir_Kind_Anonymous_Signal_Declaration =>
return Name;
-- A loop of generate parameter.
@@ -463,6 +464,7 @@ package body Vhdl.Utils is
when Iir_Kind_Signal_Declaration
| Iir_Kind_Interface_Signal_Declaration
| Iir_Kind_Guard_Signal_Declaration
+ | Iir_Kind_Anonymous_Signal_Declaration
| Iir_Kinds_Signal_Attribute =>
return True;
when Iir_Kind_Object_Alias_Declaration =>