1 files changed, 16 insertions, 0 deletions
diff --git a/testsuite/synth/issue1591/repro3.vhdl b/testsuite/synth/issue1591/repro3.vhdl
new file mode 100644
index 000000000..cd176d557
--- /dev/null
+++ b/testsuite/synth/issue1591/repro3.vhdl
@@ -0,0 +1,16 @@
+library ieee;
+  use ieee.std_logic_1164.all;
+
+entity repro3 is
+  port (clk : in std_logic;
+        o : out boolean);
+end entity repro3;
+
+architecture psl of repro3 is
+begin
+  testG : if true generate
+    signal b : boolean := true;
+  begin
+    assert b;
+  end generate testG;
+end architecture psl;