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Diffstat (limited to 'testsuite/synth/issue960/ent.vhdl')
-rw-r--r-- | testsuite/synth/issue960/ent.vhdl | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/testsuite/synth/issue960/ent.vhdl b/testsuite/synth/issue960/ent.vhdl new file mode 100644 index 000000000..41873645d --- /dev/null +++ b/testsuite/synth/issue960/ent.vhdl @@ -0,0 +1,24 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity ent is + port ( + clk : in std_logic + ); +end; + +architecture a of ent is + procedure inv(signal s : inout std_logic) is + begin + s <= not s; + end procedure; + + signal test : std_logic; +begin + process(clk) + begin + if rising_edge(clk) then + inv(test); + end if; + end process; +end; |