1 files changed, 21 insertions, 0 deletions
diff --git a/testsuite/synth/range01/revrng01.vhdl b/testsuite/synth/range01/revrng01.vhdl
new file mode 100644
index 000000000..865d1dab8
--- /dev/null
+++ b/testsuite/synth/range01/revrng01.vhdl
@@ -0,0 +1,21 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity revrng01 is
+  port (a : std_logic_vector (7 downto 0);
+        o : out std_logic_vector (7 downto 0));
+end revrng01;
+
+architecture behav of revrng01 is
+  function rev (v : std_logic_vector) return std_logic_vector
+  is
+    variable temp : std_logic_vector(v'reverse_range);
+  begin
+    for i in v'range loop
+      temp (i) := v (i);
+    end loop;
+    return temp;
+  end rev;
+begin
+  o <= rev (a);
+end behav;