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-rw-r--r--testsuite/synth/if02/if01.vhdl15
-rw-r--r--testsuite/synth/if02/if02.vhdl15
-rw-r--r--testsuite/synth/if02/if03.vhdl21
-rwxr-xr-xtestsuite/synth/if02/testsuite.sh9
4 files changed, 60 insertions, 0 deletions
diff --git a/testsuite/synth/if02/if01.vhdl b/testsuite/synth/if02/if01.vhdl
new file mode 100644
index 000000000..fa515cd7d
--- /dev/null
+++ b/testsuite/synth/if02/if01.vhdl
@@ -0,0 +1,15 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity if01 is
+ port (a : std_logic;
+ b : std_logic;
+ sel : std_logic;
+ s : out std_logic);
+end if01;
+
+architecture behav of if01 is
+begin
+ s <= a when sel = '0'
+ else b when sel = '1';
+end behav;
diff --git a/testsuite/synth/if02/if02.vhdl b/testsuite/synth/if02/if02.vhdl
new file mode 100644
index 000000000..b9155c7c4
--- /dev/null
+++ b/testsuite/synth/if02/if02.vhdl
@@ -0,0 +1,15 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity if01 is
+ port (a : std_logic;
+ b : std_logic;
+ sel : std_logic_vector (1 downto 0);
+ s : out std_logic);
+end if01;
+
+architecture behav of if01 is
+begin
+ s <= a when sel = "01"
+ else b when sel = "10";
+end behav;
diff --git a/testsuite/synth/if02/if03.vhdl b/testsuite/synth/if02/if03.vhdl
new file mode 100644
index 000000000..6ff896358
--- /dev/null
+++ b/testsuite/synth/if02/if03.vhdl
@@ -0,0 +1,21 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity if03 is
+ port (a : std_logic;
+ b : std_logic;
+ sel : std_logic;
+ s : out std_logic);
+end if03;
+
+architecture behav of if03 is
+begin
+ process (a, b, sel)
+ begin
+ if sel = '0' then
+ s <= a;
+ elsif sel = '1' then
+ s <= b;
+ end if;
+ end process;
+end behav;
diff --git a/testsuite/synth/if02/testsuite.sh b/testsuite/synth/if02/testsuite.sh
new file mode 100755
index 000000000..575200dcb
--- /dev/null
+++ b/testsuite/synth/if02/testsuite.sh
@@ -0,0 +1,9 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+for t in if01 if02 if03; do
+ synth_failure $t.vhdl -e
+done
+
+echo "Test successful"