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diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/free_equations/test2.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/free_equations/test2.ams new file mode 100644 index 000000000..40e1a6e16 --- /dev/null +++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/free_equations/test2.ams @@ -0,0 +1,72 @@ + +-- Copyright (C) 2000-2002 The University of Cincinnati. +-- All rights reserved. + +-- This file is part of VESTs (Vhdl tESTs). + +-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE +-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE +-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, +-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY +-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR +-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. + +-- By using or copying this Software, Licensee agrees to abide by the +-- intellectual property laws, and all other applicable laws of the U.S., +-- and the terms of this license. + +-- You may modify, distribute, and use the software contained in this +-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2, +-- June 1991. A copy of this license agreement can be found in the file +-- "COPYING", distributed with this archive. + +-- You should have received a copy of the GNU General Public License +-- along with VESTs; if not, write to the Free Software Foundation, +-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +-- --------------------------------------------------------------------- +-- +-- $Id: test2.ams,v 1.1 2002-03-27 22:11:17 paw Exp $ +-- $Revision: 1.1 $ +-- +-- --------------------------------------------------------------------- + +PACKAGE electricalSystem IS + NATURE electrical IS real ACROSS real THROUGH Ground reference; + FUNCTION SIN(X : real) RETURN real; + FUNCTION TAN(X : real) RETURN real; + FUNCTION EXP(X : real) RETURN real; + FUNCTION SQRT(X : real) RETURN real; + FUNCTION POW(X,Y : real) RETURN real; +END PACKAGE electricalSystem; + +use work.electricalsystem.all; + +--entity declaration + +ENTITY RLC IS + +END RLC; + +--architecture declaration + +ARCHITECTURE behavior OF RLC IS + + quantity qfree:real:=0.0; + quantity qdot : real ; + quantity comp : real ; +BEGIN + +e1 : qdot == qfree'dot; + + +e2:qfree == 5.0 * sin(2.0 * 3.1415 * 10.0 --sine source + * real(time'pos(now)) * 1.0e-15); + +e3 : if (qfree <= 0.0) use + comp == -1.00; + else + comp == 1.00; + end use; + +END architecture behavior; |